[Intel-gfx] [PATCH v2 2/2] drm/i915/dg2: Add workaround 18019627453

Matt Roper matthew.d.roper at intel.com
Tue Apr 19 21:26:40 UTC 2022


On Tue, Apr 19, 2022 at 11:27:53AM -0700, José Roberto de Souza wrote:
> A new DG2 workaround added to fix some corner cases hangs.
> 
> v2:
> - implementing the second and preferred option for this workaround
> 
> BSpec: 54077
> BSpec: 68173
> BSpec: 71488
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 29c8cd0a81b6f..a05c4b99b3fbc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2194,11 +2194,15 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>  		 */
>  		wa_write_or(wal, GEN7_FF_THREAD_MODE,
>  			    GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
> +	}
>  
> +	if (IS_ALDERLAKE_P(i915) || IS_DG2(i915) || IS_ALDERLAKE_S(i915) ||
> +	    IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
>  		/*
>  		 * Wa_1606700617:tgl,dg1,adl-p
>  		 * Wa_22010271021:tgl,rkl,dg1,adl-s,adl-p
>  		 * Wa_14010826681:tgl,dg1,rkl,adl-p
> +		 * Wa_18019627453:dg2
>  		 */
>  		wa_masked_en(wal,
>  			     GEN9_CS_DEBUG_MODE1,
> -- 
> 2.35.3
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795


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