[Intel-gfx] [PATCH] i915: Add first set of DG2 PCI IDs

[Matt Roper]

Looks like I somehow lost the "drm/" at the beginning of the subject
line prefix...that wasn't intentional.


Matt

On Fri, Apr 22, 2022 at 09:55:35AM -0700, Matt Roper wrote:
> The IDs added here are the subset reserved for 'motherboard down'
> designs of DG2.  We have all the necessary support upstream to enable
> these now (although they'll continue to require force_probe until the
> usual requirements are met).
> 
> The remaining DG2 IDs for add-in cards will come in a future patch once
> some additional required functionality has fully landed.
> 
> Bspec: 44477
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Cc: Daniel Vetter <daniel at ffwll.ch>
> Cc: Dave Airlie <airlied at gmail.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> 
> These IDs already exist in drm-tip via the topic/core-for-CI branch, so
> I've based this patch on drm-intel-next (where we intend to land it)
> instead of drm-tip.
> 
>  drivers/gpu/drm/i915/i915_pci.c          |  2 +-
>  drivers/gpu/drm/i915/intel_device_info.c | 21 +++++++++++++++++++++
>  include/drm/i915_pciids.h                | 22 ++++++++++++++++++++++
>  3 files changed, 44 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f59e526b03fc..c88e454a74bb 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1056,7 +1056,6 @@ static const struct intel_device_info xehpsdv_info = {
>  		BIT(VECS0) | BIT(VECS1) | \
>  		BIT(VCS0) | BIT(VCS2)
>  
> -__maybe_unused
>  static const struct intel_device_info dg2_info = {
>  	DG2_FEATURES,
>  	XE_LPD_FEATURES,
> @@ -1152,6 +1151,7 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_DG1_IDS(&dg1_info),
>  	INTEL_RPLS_IDS(&adl_s_info),
>  	INTEL_RPLP_IDS(&adl_p_info),
> +	INTEL_DG2_IDS(&dg2_info),
>  	{0, 0, 0}
>  };
>  MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 74c3ffb66b8d..cefa9ed784ff 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -186,6 +186,18 @@ static const u16 subplatform_rpl_ids[] = {
>  	INTEL_RPLP_IDS(0),
>  };
>  
> +static const u16 subplatform_g10_ids[] = {
> +	INTEL_DG2_G10_IDS(0),
> +};
> +
> +static const u16 subplatform_g11_ids[] = {
> +	INTEL_DG2_G11_IDS(0),
> +};
> +
> +static const u16 subplatform_g12_ids[] = {
> +	INTEL_DG2_G12_IDS(0),
> +};
> +
>  static bool find_devid(u16 id, const u16 *p, unsigned int num)
>  {
>  	for (; num; num--, p++) {
> @@ -231,6 +243,15 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
>  	} else if (find_devid(devid, subplatform_rpl_ids,
>  			      ARRAY_SIZE(subplatform_rpl_ids))) {
>  		mask = BIT(INTEL_SUBPLATFORM_RPL);
> +	} else if (find_devid(devid, subplatform_g10_ids,
> +			      ARRAY_SIZE(subplatform_g10_ids))) {
> +		mask = BIT(INTEL_SUBPLATFORM_G10);
> +	} else if (find_devid(devid, subplatform_g11_ids,
> +			      ARRAY_SIZE(subplatform_g11_ids))) {
> +		mask = BIT(INTEL_SUBPLATFORM_G11);
> +	} else if (find_devid(devid, subplatform_g12_ids,
> +			      ARRAY_SIZE(subplatform_g12_ids))) {
> +		mask = BIT(INTEL_SUBPLATFORM_G12);
>  	}
>  
>  	GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index a7b5eea7ffaa..283dadfbb4db 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -692,4 +692,26 @@
>  	INTEL_VGA_DEVICE(0xA7A8, info), \
>  	INTEL_VGA_DEVICE(0xA7A9, info)
>  
> +/* DG2 */
> +#define INTEL_DG2_G10_IDS(info) \
> +	INTEL_VGA_DEVICE(0x5690, info), \
> +	INTEL_VGA_DEVICE(0x5691, info), \
> +	INTEL_VGA_DEVICE(0x5692, info)
> +
> +#define INTEL_DG2_G11_IDS(info) \
> +	INTEL_VGA_DEVICE(0x5693, info), \
> +	INTEL_VGA_DEVICE(0x5694, info), \
> +	INTEL_VGA_DEVICE(0x5695, info), \
> +	INTEL_VGA_DEVICE(0x56B0, info)
> +
> +#define INTEL_DG2_G12_IDS(info) \
> +	INTEL_VGA_DEVICE(0x5696, info), \
> +	INTEL_VGA_DEVICE(0x5697, info), \
> +	INTEL_VGA_DEVICE(0x56B2, info)
> +
> +#define INTEL_DG2_IDS(info) \
> +	INTEL_DG2_G10_IDS(info), \
> +	INTEL_DG2_G11_IDS(info), \
> +	INTEL_DG2_G12_IDS(info)
> +
>  #endif /* _I915_PCIIDS_H */
> -- 
> 2.35.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795