[Intel-gfx] [PATCH] drm/i915/dg2: Add additional HDMI pixel clock frequencies

kernel test robot lkp at intel.com
Tue Aug 2 00:13:13 UTC 2022


Hi Clinton,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]

url:    https://github.com/intel-lab-lkp/linux/commits/Taylor-Clinton-A/drm-i915-dg2-Add-additional-HDMI-pixel-clock-frequencies/20220802-052426
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-defconfig (https://download.01.org/0day-ci/archive/20220802/202208020808.1c3aqM8h-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
        # https://github.com/intel-lab-lkp/linux/commit/0f55e9fd0a3944ad3a0a17bdf7ccb64be62b433e
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Taylor-Clinton-A/drm-i915-dg2-Add-additional-HDMI-pixel-clock-frequencies/20220802-052426
        git checkout 0f55e9fd0a3944ad3a0a17bdf7ccb64be62b433e
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp at intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_snps_phy.c:1480:39: error: 'dg2_hdmi_297000' defined but not used [-Werror=unused-const-variable=]
    1480 | static const struct intel_mpllb_state dg2_hdmi_297000 = {
         |                                       ^~~~~~~~~~~~~~~
   cc1: all warnings being treated as errors


vim +/dg2_hdmi_297000 +1480 drivers/gpu/drm/i915/display/intel_snps_phy.c

  1479	
> 1480	static const struct intel_mpllb_state dg2_hdmi_297000 = {
  1481		.clock = 297000,
  1482		.ref_control =
  1483			REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 3),
  1484		.mpllb_cp =
  1485			REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 6) |
  1486			REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 14) |
  1487			REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 64) |
  1488			REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 124),
  1489		.mpllb_div =
  1490			REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
  1491			REG_FIELD_PREP(SNPS_PHY_MPLLB_TX_CLK_DIV, 1) |
  1492			REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
  1493			REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 2) |
  1494			REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 3),
  1495		.mpllb_div2 =
  1496			REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 1) |
  1497			REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 86) |
  1498			REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
  1499		.mpllb_fracn1 =
  1500			REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
  1501			REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, 1) |
  1502			REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 65535),
  1503		.mpllb_fracn2 =
  1504			REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 26214) |
  1505			REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 26214),
  1506		.mpllb_sscen =
  1507			REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_UP_SPREAD, 1),
  1508	};
  1509	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp


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