[Intel-gfx] [RFC v4 06/17] drm/display/dp_mst: Add some missing kdocs for atomic MST structs
Lyude Paul
lyude at redhat.com
Wed Aug 17 19:38:35 UTC 2022
Since we're about to start adding some stuff here, we may as well fill in
any missing documentation that we forgot to write.
Signed-off-by: Lyude Paul <lyude at redhat.com>
Cc: Wayne Lin <Wayne.Lin at amd.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Fangzhi Zuo <Jerry.Zuo at amd.com>
Cc: Jani Nikula <jani.nikula at intel.com>
Cc: Imre Deak <imre.deak at intel.com>
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
Cc: Sean Paul <sean at poorly.run>
Acked-by: Jani Nikula <jani.nikula at intel.com>
---
include/drm/display/drm_dp_mst_helper.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h
index 9cdd2def56a1..3b155ad3eee4 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -542,7 +542,14 @@ struct drm_dp_payload {
#define to_dp_mst_topology_state(x) container_of(x, struct drm_dp_mst_topology_state, base)
+/**
+ * struct drm_dp_mst_atomic_payload - Atomic state struct for an MST payload
+ *
+ * The primary atomic state structure for a given MST payload. Stores information like current
+ * bandwidth allocation, intended action for this payload, etc.
+ */
struct drm_dp_mst_atomic_payload {
+ /** @port: The MST port assigned to this payload */
struct drm_dp_mst_port *port;
/**
@@ -551,16 +558,32 @@ struct drm_dp_mst_atomic_payload {
* the immediate downstream DP Rx
*/
int time_slots;
+ /** @pbn: The payload bandwidth for this payload */
int pbn;
+ /** @dsc_enabled: Whether or not this payload has DSC enabled */
bool dsc_enabled;
+
+ /** @next: The list node for this payload */
struct list_head next;
};
+/**
+ * struct drm_dp_mst_topology_state - DisplayPort MST topology atomic state
+ *
+ * This struct represents the atomic state of the toplevel DisplayPort MST manager
+ */
struct drm_dp_mst_topology_state {
+ /** @base: Base private state for atomic */
struct drm_private_state base;
+
+ /** @payloads: The list of payloads being created/destroyed in this state */
struct list_head payloads;
+ /** @mgr: The topology manager */
struct drm_dp_mst_topology_mgr *mgr;
+
+ /** @total_avail_slots: The total number of slots this topology can handle (63 or 64) */
u8 total_avail_slots;
+ /** @start_slot: The first usable time slot in this topology (1 or 0) */
u8 start_slot;
};
--
2.37.1
More information about the Intel-gfx
mailing list