[Intel-gfx] [PATCH 02/13] drm/i915: Clean up GAMMA_MODE defines

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>

On 11/23/2022 8:56 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Use REG_BIT() & co. for GAMMA_MODE bits.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index b1c314093737..52d289f55ce1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5309,14 +5309,14 @@
>   #define _GAMMA_MODE_A		0x4a480
>   #define _GAMMA_MODE_B		0x4ac80
>   #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
> -#define  PRE_CSC_GAMMA_ENABLE	(1 << 31)
> -#define  POST_CSC_GAMMA_ENABLE	(1 << 30)
> -#define  GAMMA_MODE_MODE_MASK	(3 << 0)
> -#define  GAMMA_MODE_MODE_8BIT	(0 << 0)
> -#define  GAMMA_MODE_MODE_10BIT	(1 << 0)
> -#define  GAMMA_MODE_MODE_12BIT	(2 << 0)
> -#define  GAMMA_MODE_MODE_SPLIT	(3 << 0) /* ivb-bdw */
> -#define  GAMMA_MODE_MODE_12BIT_MULTI_SEG	(3 << 0) /* icl-tgl */
> +#define  PRE_CSC_GAMMA_ENABLE			REG_BIT(31) /* icl+ */
> +#define  POST_CSC_GAMMA_ENABLE			REG_BIT(30) /* icl+ */
> +#define  GAMMA_MODE_MODE_MASK			REG_GENMASK(1, 0)
> +#define  GAMMA_MODE_MODE_8BIT			REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 0)
> +#define  GAMMA_MODE_MODE_10BIT			REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 1)
> +#define  GAMMA_MODE_MODE_12BIT			REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 2)
> +#define  GAMMA_MODE_MODE_SPLIT			REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 3) /* ivb-bdw */
> +#define  GAMMA_MODE_MODE_12BIT_MULTI_SEG	REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 3) /* icl-tgl */
>   
>   /* Display Internal Timeout Register */
>   #define RM_TIMEOUT		_MMIO(0x42060)