[Intel-gfx] [PATCH v6 2/2] drm/i915/mtl: Limit scaler input to 4k in plane scaling
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Dec 20 21:10:34 UTC 2022
On Tue, Dec 20, 2022 at 02:07:24PM +0200, Luca Coelho wrote:
> From: Animesh Manna <animesh.manna at intel.com>
>
> As part of die area reduction max input source modified to 4096
> for MTL so modified range check logic of scaler.
>
> Signed-off-by: Jos? Roberto de Souza <jose.souza at intel.com>
> Signed-off-by: Animesh Manna <animesh.manna at intel.com>
> Signed-off-by: Luca Coelho <luciano.coelho at intel.com>
> ---
> drivers/gpu/drm/i915/display/skl_scaler.c | 31 +++++++++++++++++------
> 1 file changed, 23 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index d7390067b7d4..6baa07142b03 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -103,6 +103,8 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> + int min_src_w, min_src_h, min_dst_w, min_dst_h;
> + int max_src_w, max_src_h, max_dst_w, max_dst_h;
>
> /*
> * Src coordinates are already rotated by 270 degrees for
> @@ -157,15 +159,28 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> return -EINVAL;
> }
>
> + min_src_w = SKL_MIN_SRC_W;
> + min_src_h = SKL_MIN_SRC_H;
> + min_dst_w = SKL_MIN_DST_W;
> + min_dst_h = SKL_MIN_DST_H;
> +
> + if (DISPLAY_VER(dev_priv) >= 11 && DISPLAY_VER(dev_priv) < 14) {
> + max_src_w = ICL_MAX_SRC_W;
> + max_src_h = ICL_MAX_SRC_H;
> + max_dst_w = ICL_MAX_DST_W;
> + max_dst_h = ICL_MAX_DST_H;
> + } else {
> + max_src_w = SKL_MAX_SRC_W;
> + max_src_h = SKL_MAX_SRC_H;
> + max_dst_w = SKL_MAX_DST_W;
> + max_dst_h = SKL_MAX_DST_H;
> + }
Bspec says max_src_w=4096, max_src_h=8192, max_dst_w=8192,
max_dst_h=8192.
> +
> /* range checks */
> - if (src_w < SKL_MIN_SRC_W || src_h < SKL_MIN_SRC_H ||
> - dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H ||
> - (DISPLAY_VER(dev_priv) >= 11 &&
> - (src_w > ICL_MAX_SRC_W || src_h > ICL_MAX_SRC_H ||
> - dst_w > ICL_MAX_DST_W || dst_h > ICL_MAX_DST_H)) ||
> - (DISPLAY_VER(dev_priv) < 11 &&
> - (src_w > SKL_MAX_SRC_W || src_h > SKL_MAX_SRC_H ||
> - dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H))) {
> + if (src_w < min_src_w || src_h < min_src_h ||
> + dst_w < min_dst_w || dst_h < min_dst_h ||
> + src_w > max_src_w || src_h > max_src_h ||
> + dst_w > max_dst_w || dst_h > max_dst_h) {
> drm_dbg_kms(&dev_priv->drm,
> "scaler_user index %u.%u: src %ux%u dst %ux%u "
> "size is out of scaler range\n",
> --
> 2.38.1
--
Ville Syrjälä
Intel
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