[Intel-gfx] [PATCH 4/4] fixup! drm/i915: Remove platform comments from workarounds
Lucas De Marchi
lucas.demarchi at intel.com
Thu Dec 22 08:25:57 UTC 2022
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
drivers/gpu/drm/i915/i915_perf.c | 4 ++--
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 328c886309f3..543881838def 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1636,7 +1636,7 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
if (full_update) {
/*
- * Not applying Wa_14014971508
+ * Not applying Wa_14014971508 as we do not support the
* feature that requires this workaround.
*/
val |= man_trk_ctl_single_full_frame_bit_get(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 49f7e1fbd96c..9e6686b8c8f0 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1590,7 +1590,7 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_oa_buffer(stream);
/*
- * Wa_16011777198
+ * Wa_16011777198 - Unset the override of GUCRC mode to enable rc6.
*/
if (intel_uc_uses_guc_rc(>->uc) &&
(IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
@@ -3293,7 +3293,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);
/*
- * Wa_16011777198
+ * Wa_16011777198 - GuC resets render as part of the Wa. This causes
* OA to lose the configuration state. Prevent this by overriding GUCRC
* mode.
*/
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 82a59738ca4a..492973085297 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4578,7 +4578,7 @@ static void ivb_init_clock_gating(struct drm_i915_private *dev_priv)
/*
* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
- * This implements the WaDisableRCZUnitClockGating
+ * This implements the WaDisableRCZUnitClockGating workaround.
*/
intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL2,
GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
@@ -4615,7 +4615,7 @@ static void vlv_init_clock_gating(struct drm_i915_private *dev_priv)
/*
* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
- * This implements the WaDisableRCZUnitClockGating
+ * This implements the WaDisableRCZUnitClockGating workaround.
*/
intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL2,
GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index e56dbb20f2fe..182791a9cabb 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1887,7 +1887,7 @@ static const struct intel_forcewake_range __xelpmp_fw_ranges[] = {
static void
ilk_dummy_write(struct intel_uncore *uncore)
{
- /* WaIssueDummyWriteToWakeupFromRC6
+ /* WaIssueDummyWriteToWakeupFromRC6 - Issue a dummy write to wake up
* the chip from rc6 before touching it for real. MI_MODE is masked,
* hence harmless to write 0 into. */
__raw_uncore_write32(uncore, RING_MI_MODE(RENDER_RING_BASE), 0);
--
2.39.0
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