[Intel-gfx] [PATCH v5 09/10] drm/i915/guc: Follow legacy register names

[Teres Alexis, Alan Previn]

Squash will be much easier if i also squash all the prior register table additions together
Should i do that? Squash XeLP + DG2 + Gen9 and this together?

On Thu, 2022-02-03 at 11:09 -0800, Matthew Brost wrote:
> On Wed, Jan 26, 2022 at 02:48:21AM -0800, Alan Previn wrote:
> > Before we print the GuC provided register dumps, modify the
> > register tables to use string names as per the legacy error
> > capture execlist codes.
> > 
> > Signed-off-by: Alan Previn <alan.previn.teres.alexis at intel.com>
> 
> I'd just squash this to the patches early in the series where these are
> initially defined.
> 
> Matt 
> 
> > ---
> >  .../gpu/drm/i915/gt/uc/intel_guc_capture.c    | 70 +++++++++----------
> >  1 file changed, 35 insertions(+), 35 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > index 2f5dc413dddc..506496058daf 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> > @@ -22,7 +22,7 @@
> >   *       from the engine-mmio-base
> >   */
> >  #define COMMON_BASE_GLOBAL() \
> > -	{FORCEWAKE_MT,             0,      0, "FORCEWAKE_MT"}
> > +	{FORCEWAKE_MT,             0,      0, "FORCEWAKE"}
> >  
> >  #define COMMON_GEN9BASE_GLOBAL() \
> >  	{GEN8_FAULT_TLB_DATA0,     0,      0, "GEN8_FAULT_TLB_DATA0"}, \
> >