[Intel-gfx] [PATCH 0/6] More GT register cleanup

Matt Roper matthew.d.roper at intel.com
Wed Feb 9 05:11:34 UTC 2022


Another collection of cleanup patches for intel_gt_regs.h to make it a
bit less painful to work with.

Cc: Jani Nikula <jani.nikula at linux.intel.com>

Matt Roper (6):
  drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18
  drm/i915/gt: Move SFC lock bits to intel_engine_regs.h
  drm/i915/gt: Use parameterized RING_MI_MODE
  drm/i915/gt: Cleanup spacing of intel_gt_regs.h
  drm/i915/gt: Use consistent offset notation in intel_gt_regs.h
  drm/i915/gt: Order GT registers by MMIO offset

 drivers/gpu/drm/i915/gt/intel_engine_regs.h |   23 +
 drivers/gpu/drm/i915/gt/intel_gt_regs.h     | 2623 +++++++++----------
 drivers/gpu/drm/i915/gt/intel_reset.c       |   14 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c |    6 +-
 drivers/gpu/drm/i915/intel_uncore.c         |    2 +-
 5 files changed, 1333 insertions(+), 1335 deletions(-)

-- 
2.34.1



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