[Intel-gfx] [PATCH v5 03/10] drm/i915/guc: Add DG2 registers for GuC error state capture.
Teres Alexis, Alan Previn
alan.previn.teres.alexis at intel.com
Fri Feb 11 19:24:45 UTC 2022
On this specific question.
On Fri, 2022-02-04 at 17:28 -0800, Umesh Nerlige Ramappa wrote:
> On Wed, Jan 26, 2022 at 02:48:15AM -0800, Alan Previn wrote:
> > Add additional DG2 registers for GuC error state capture.
> > + num_steer_regs = ARRAY_SIZE(xelpd_extregs);
> > + if (ipver >= IP_VER(12, 55))
> What does this actually mean? 12 55 has both lpd and hpg regs?
Yes - at least for the current platforms we are addressing in
this function - but i will split them so these checks would be
removed from here
> You could (if possible) use has_lpd_regs/has_hpg_regs in i915_pci.c to
> simplify the platform specific logic.
I will check those if if we can be be used here.
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