[Intel-gfx] [PATCH 0/3] drm/i915/dg2: 5th Display output

[Ramalingam C]

Fixing the 5th Display output for DG2.

Jouni Högander (1):
  drm/i915: Fix for PHY_MISC_TC1 offset

Matt Roper (2):
  drm/i915/dg2: Enable 5th display
  drm/i915/dg2: Drop 38.4 MHz MPLLB tables

 drivers/gpu/drm/i915/display/intel_gmbus.c    |  16 +-
 drivers/gpu/drm/i915/display/intel_snps_phy.c | 210 +-----------------
 drivers/gpu/drm/i915/i915_irq.c               |   5 +-
 drivers/gpu/drm/i915/i915_reg.h               |   7 +-
 4 files changed, 25 insertions(+), 213 deletions(-)

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2.20.1