[Intel-gfx] [PATCH 1/6] drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18

Matt Atwood matthew.s.atwood at intel.com
Tue Feb 15 21:23:12 UTC 2022


On Tue, Feb 08, 2022 at 09:11:35PM -0800, Matt Roper wrote:
> Due to some mistaken merge conflict resolution, we wound up with a copy
> of VDBOX_CGCTL3F18 in both intel_engine_regs.h and intel_gt_regs.h.
> Since this is a per-engine register, referenced relative to an engine's
> base offset, drop the copy from intel_gt_regs.h
> 
Reviewed-by: Matt Atwood <matthew.s.atwood at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index a6f0220c2e9f..e73c706e7f0d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -368,9 +368,6 @@
>  #define NOPID		_MMIO(0x2094)
>  #define HWSTAM		_MMIO(0x2098)
>  
> -#define VDBOX_CGCTL3F18(base)		_MMIO((base) + 0x3f18)
> -#define   ALNUNIT_CLKGATE_DIS		REG_BIT(13)
> -
>  #define ERROR_GEN6	_MMIO(0x40a0)
>  
>  #define GEN8_FAULT_TLB_DATA0		_MMIO(0x4b10)
> -- 
> 2.34.1
> 


More information about the Intel-gfx mailing list