[Intel-gfx] [PATCH topic/for-CI] drm/i915: Add DG2 PCI IDs

Matt Roper matthew.d.roper at intel.com
Wed Feb 16 21:22:20 UTC 2022


Applied to the topic/core-for-CI branch so that CI testing can get
started on DG2 soon.  Thanks for the review.


Matt

On Wed, Feb 16, 2022 at 04:13:14PM +0000, Yokoyama, Caz wrote:
> Reviewed-by: Caz Yokoyama <caz.yokoyama at intel.com>
> -caz
> 
> On Tue, 2022-02-15 at 13:45 -0800, Matt Roper wrote:
> > DG2 hardware will start showing up in CI shortly; let's make sure
> > it's
> > recognized by the driver.
> > 
> > Bspec: 44477
> > Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Cc: Jani Nikula <jani.nikula at intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
> > Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_pci.c          |  2 +-
> >  drivers/gpu/drm/i915/intel_device_info.c | 21 ++++++++++++++++++
> >  include/drm/i915_pciids.h                | 27
> > ++++++++++++++++++++++++
> >  3 files changed, 49 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c
> > b/drivers/gpu/drm/i915/i915_pci.c
> > index 8246cbe9b01d..91677a9f330c 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -1038,7 +1038,6 @@ static const struct intel_device_info
> > xehpsdv_info = {
> >  	.require_force_probe = 1,
> >  };
> >  
> > -__maybe_unused
> >  static const struct intel_device_info dg2_info = {
> >  	XE_HP_FEATURES,
> >  	XE_HPM_FEATURES,
> > @@ -1137,6 +1136,7 @@ static const struct pci_device_id pciidlist[] =
> > {
> >  	INTEL_ADLN_IDS(&adl_p_info),
> >  	INTEL_DG1_IDS(&dg1_info),
> >  	INTEL_RPLS_IDS(&adl_s_info),
> > +	INTEL_DG2_IDS(&dg2_info),
> >  	{0, 0, 0}
> >  };
> >  MODULE_DEVICE_TABLE(pci, pciidlist);
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> > b/drivers/gpu/drm/i915/intel_device_info.c
> > index 94da5aa37391..ae13bc3c7970 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.c
> > +++ b/drivers/gpu/drm/i915/intel_device_info.c
> > @@ -178,6 +178,18 @@ static const u16 subplatform_rpls_ids[] = {
> >  	INTEL_RPLS_IDS(0),
> >  };
> >  
> > +static const u16 subplatform_g10_ids[] = {
> > +	INTEL_DG2_G10_IDS(0),
> > +};
> > +
> > +static const u16 subplatform_g11_ids[] = {
> > +	INTEL_DG2_G11_IDS(0),
> > +};
> > +
> > +static const u16 subplatform_g12_ids[] = {
> > +	INTEL_DG2_G12_IDS(0),
> > +};
> > +
> >  static bool find_devid(u16 id, const u16 *p, unsigned int num)
> >  {
> >  	for (; num; num--, p++) {
> > @@ -220,6 +232,15 @@ void intel_device_info_subplatform_init(struct
> > drm_i915_private *i915)
> >  	} else if (find_devid(devid, subplatform_rpls_ids,
> >  			      ARRAY_SIZE(subplatform_rpls_ids))) {
> >  		mask = BIT(INTEL_SUBPLATFORM_RPL_S);
> > +	} else if (find_devid(devid, subplatform_g10_ids,
> > +			      ARRAY_SIZE(subplatform_g10_ids))) {
> > +		mask = BIT(INTEL_SUBPLATFORM_G10);
> > +	} else if (find_devid(devid, subplatform_g11_ids,
> > +			      ARRAY_SIZE(subplatform_g11_ids))) {
> > +		mask = BIT(INTEL_SUBPLATFORM_G11);
> > +	} else if (find_devid(devid, subplatform_g12_ids,
> > +			      ARRAY_SIZE(subplatform_g12_ids))) {
> > +		mask = BIT(INTEL_SUBPLATFORM_G12);
> >  	}
> >  
> >  	if (IS_TIGERLAKE(i915)) {
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > index 533890dc9da1..3609f3254f24 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -681,4 +681,31 @@
> >  	INTEL_VGA_DEVICE(0xA788, info), \
> >  	INTEL_VGA_DEVICE(0xA789, info)
> >  
> > +/* DG2 */
> > +#define INTEL_DG2_G10_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x5690, info), \
> > +	INTEL_VGA_DEVICE(0x5691, info), \
> > +	INTEL_VGA_DEVICE(0x5692, info), \
> > +	INTEL_VGA_DEVICE(0x56A0, info), \
> > +	INTEL_VGA_DEVICE(0x56A1, info), \
> > +	INTEL_VGA_DEVICE(0x56A2, info)
> > +
> > +#define INTEL_DG2_G11_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x5693, info), \
> > +	INTEL_VGA_DEVICE(0x5694, info), \
> > +	INTEL_VGA_DEVICE(0x5695, info), \
> > +	INTEL_VGA_DEVICE(0x56A5, info), \
> > +	INTEL_VGA_DEVICE(0x56A6, info), \
> > +	INTEL_VGA_DEVICE(0x56B0, info), \
> > +	INTEL_VGA_DEVICE(0x56B1, info)
> > +
> > +#define INTEL_DG2_G12_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x56A3, info), \
> > +	INTEL_VGA_DEVICE(0x56A4, info)
> > +
> > +#define INTEL_DG2_IDS(info) \
> > +	INTEL_DG2_G10_IDS(info), \
> > +	INTEL_DG2_G11_IDS(info), \
> > +	INTEL_DG2_G12_IDS(info)
> > +
> >  #endif /* _I915_PCIIDS_H */

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795


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