[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display/tgl+: Implement new PLL programming step (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display/tgl+: Implement new PLL programming step (rev3)
URL   : https://patchwork.freedesktop.org/series/99867/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ab74bc303b59 drm/i915/display/tgl+: Implement new PLL programming step
-:247: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#247: FILE: drivers/gpu/drm/i915/i915_reg.h:7875:
+#define TGL_DPLL0_DIV0(pll)				_MMIO_PLL(pll, _TGL_DPLL0_DIV0, _TGL_DPLL1_DIV0)

-:249: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#249: FILE: drivers/gpu/drm/i915/i915_reg.h:7877:
+#define   TGL_DPLL0_DIV0_AFC_STARTUP(val)		REG_FIELD_PREP(TGL_DPLL0_DIV0_AFC_STARTUP_MASK, (val))

total: 0 errors, 2 warnings, 0 checks, 192 lines checked