[Intel-gfx] [PATCH v2 1/3] drm/i915/dg2: Enable 5th port

Lucas De Marchi lucas.demarchi at intel.com
Thu Feb 17 21:15:20 UTC 2022

On Fri, Feb 18, 2022 at 12:12:21AM +0530, Ramalingam C wrote:
>From: Matt Roper <matthew.d.roper at intel.com>
>DG2 supports a 5th display output which the hardware refers to as "TC1,"
>even though it isn't a Type-C output.  This behaves similarly to the TC1
>on past platforms with just a couple minor differences:
> * DG2's TC1 bit in SDEISR is at bit 25 rather than 24 as it is on
> * DG2 doesn't need the hpd inversion setting that we had to use on DG1
>  intel_ddi_init(dev_priv, PORT_TC1); [Matt]
>Cc: Swathi Dhanavanthri <swathi.dhanavanthri at intel.com>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: José Roberto de Souza <jose.souza at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>Signed-off-by: Ramalingam C <ramalingam.c at intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

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