[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915: Fix for PHY_MISC_TC1 offset

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/3] drm/i915: Fix for PHY_MISC_TC1 offset
URL   : https://patchwork.freedesktop.org/series/100373/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2bc5a2246dec drm/i915: Fix for PHY_MISC_TC1 offset
-:49: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'port' - possible side-effects?
#49: FILE: drivers/gpu/drm/i915/i915_reg.h:9360:
+#define DG2_PHY_MISC(port)	((port) == PHY_E ? _MMIO(_DG2_PHY_MISC_TC1) : \
+				 ICL_PHY_MISC(port))

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
d20e83eacf5a drm/i915/dg2: Drop 38.4 MHz MPLLB tables
f128d3a75f3d drm/i915/dg2: Enable 5th port