[Intel-gfx] [PATCH 1/4] drm/i915: Move PIPE_CHICKEN RMW out from the vblank evade critical section

[Juha-Pekka Heikkila]

This patch set look all ok. That failed cursor test in ci run seem to be 
flip flopping on other runs too on same icl box.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>

On 2.2.2022 13.16, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> We don't want any RMWs in the part of the commit that happens
> under vblank evasion. Eventually we want to use the DSB to
> handle that and it can't read registers at all. Also reads
> are just slowing us down needlessly.
> 
> Let's move the whole PIPE_CHICKEN stuff out from the critical
> section since we don't have anything there that needs to be
> syncrhonized with other plane/pipe registers. If we ever need
> to add such things then we have to move it back, but without
> doing any reads.
> 
> TODO: should look into eliminating the RMW anyway...
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c | 7 ++++---
>   1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index c431076f98a1..05713b64d4bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8121,9 +8121,6 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
>   	if (DISPLAY_VER(dev_priv) >= 9 ||
>   	    IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
>   		hsw_set_linetime_wm(new_crtc_state);
> -
> -	if (DISPLAY_VER(dev_priv) >= 11)
> -		icl_set_pipe_chicken(new_crtc_state);
>   }
>   
>   static void commit_pipe_pre_planes(struct intel_atomic_state *state,
> @@ -8215,6 +8212,10 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>   
>   		if (new_crtc_state->update_pipe)
>   			intel_encoders_update_pipe(state, crtc);
> +
> +		if (DISPLAY_VER(dev_priv) >= 11 &&
> +		    new_crtc_state->update_pipe)
> +			icl_set_pipe_chicken(new_crtc_state);
>   	}
>   
>   	intel_fbc_update(state, crtc);