[Intel-gfx] [PATCH v3 00/11] Start cleaning up register definitions

[Rodrigo Vivi]

On Mon, Jan 10, 2022 at 09:15:49PM -0800, Matt Roper wrote:
> Let's start splitting up and cleaning up parts of i915_reg.h.  Rather
> than starting with dead code removal as we did in v1, this time we'll
> switch a few macros to parameterized style, and then move a few types of
> registers (engine registers, SNPS PHY registers) off to their own header
> files.
> 
> v3:
>  - Split out i915_reg_defs.h in its own patch
>  - Also split out combo PHY and MG/DKL PHY sets of registers
> 
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> 
> Matt Roper (11):
>   drm/i915: Use parameterized GPR register definitions everywhere
>   drm/i915: Parameterize PWRCTX_MAXCNT
>   drm/i915: Parameterize ECOSKPD
>   drm/i915: Use RING_PSMI_CTL rather than per-engine macros
>   drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7
>   drm/i915: Introduce i915_reg_defs.h
>   drm/i915/gt: Move engine registers to their own header
>   drm/i915: Move SNPS PHY registers to their own header
>   drm/i915: Move combo PHY registers to their own header
>   drm/i915: Move TC PHY registers to their own header
>   drm/i915: Drop unused _PORT3 and _PORT4 TC phy register offsets
> 
>  drivers/gpu/drm/i915/display/icl_dsi.c        |   1 +
>  .../gpu/drm/i915/display/intel_combo_phy.c    |   1 +
>  .../drm/i915/display/intel_combo_phy_regs.h   | 162 ++++
>  drivers/gpu/drm/i915/display/intel_ddi.c      |   2 +
>  .../drm/i915/display/intel_display_power.c    |   1 +
>  drivers/gpu/drm/i915/display/intel_dp.c       |   1 +
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   1 +
>  drivers/gpu/drm/i915/display/intel_snps_phy.c |   1 +
>  .../drm/i915/display/intel_snps_phy_regs.h    |  75 ++
>  drivers/gpu/drm/i915/display/intel_tc.c       |   1 +
>  .../gpu/drm/i915/display/intel_tc_phy_regs.h  | 280 ++++++
>  drivers/gpu/drm/i915/gt/gen2_engine_cs.c      |   1 +
>  drivers/gpu/drm/i915/gt/gen6_engine_cs.c      |   1 +
>  drivers/gpu/drm/i915/gt/gen6_ppgtt.c          |   1 +
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c     |   1 +
>  drivers/gpu/drm/i915/gt/intel_engine_regs.h   | 197 ++++
>  .../drm/i915/gt/intel_execlists_submission.c  |   1 +
>  drivers/gpu/drm/i915/gt/intel_gt.c            |   1 +
>  drivers/gpu/drm/i915/gt/intel_lrc.c           |   1 +
>  drivers/gpu/drm/i915/gt/intel_lrc_reg.h       |  15 -
>  drivers/gpu/drm/i915/gt/intel_rc6.c           |   9 +-
>  drivers/gpu/drm/i915/gt/intel_reset.c         |   1 +
>  drivers/gpu/drm/i915/gt/intel_ring.c          |   1 +
>  .../gpu/drm/i915/gt/intel_ring_submission.c   |  11 +-
>  drivers/gpu/drm/i915/gt/intel_workarounds.c   |   7 +-
>  drivers/gpu/drm/i915/gt/selftest_engine_pm.c  |   1 +
>  drivers/gpu/drm/i915/gt/selftest_gt_pm.c      |   1 +
>  drivers/gpu/drm/i915/gt/selftest_rps.c        |   1 +
>  drivers/gpu/drm/i915/gt/selftest_timeline.c   |   1 +
>  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    |   1 +
>  .../gpu/drm/i915/gt/uc/intel_guc_submission.c |   3 +-
>  drivers/gpu/drm/i915/gvt/cmd_parser.c         |   1 +
>  drivers/gpu/drm/i915/gvt/handlers.c           |   4 +-
>  drivers/gpu/drm/i915/gvt/mmio_context.c       |   5 +-
>  drivers/gpu/drm/i915/gvt/mmio_context.h       |   1 +
>  drivers/gpu/drm/i915/i915_cmd_parser.c        |  69 +-
>  drivers/gpu/drm/i915/i915_gpu_error.c         |   1 +
>  drivers/gpu/drm/i915/i915_perf.c              |   1 +
>  drivers/gpu/drm/i915/i915_pmu.c               |   1 +
>  drivers/gpu/drm/i915/i915_reg.h               | 841 +-----------------
>  drivers/gpu/drm/i915/i915_reg_defs.h          |  98 ++
>  drivers/gpu/drm/i915/i915_request.c           |   1 +
>  drivers/gpu/drm/i915/intel_pm.c               |  11 +-
>  drivers/gpu/drm/i915/intel_uncore.c           |   2 +-
>  44 files changed, 911 insertions(+), 907 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
>  create mode 100644 drivers/gpu/drm/i915/display/intel_snps_phy_regs.h
>  create mode 100644 drivers/gpu/drm/i915/display/intel_tc_phy_regs.h
>  create mode 100644 drivers/gpu/drm/i915/gt/intel_engine_regs.h
>  create mode 100644 drivers/gpu/drm/i915/i915_reg_defs.h

I understand that I'm late to the fun here, but I got myself wondering if
we couldn't separated the registers in a "regs" directory
and find some way to organize them in IP blocks matching the hw...

mainly thinking about 2 cases:

1. searching for registers usages...
2. the idea of having some sort of auto generation from spec...

> 
> -- 
> 2.34.1
>