[Intel-gfx] [PATCH] drm/i915/overlay: Prevent divide by zero bugs in scaling

[Ville Syrjälä]

On Mon, Jan 24, 2022 at 03:24:09PM +0300, Dan Carpenter wrote:
> Smatch detected a divide by zero bug in check_overlay_scaling().
> 
>     drivers/gpu/drm/i915/display/intel_overlay.c:976 check_overlay_scaling()
>     error: potential divide by zero bug '/ rec->dst_height'.
>     drivers/gpu/drm/i915/display/intel_overlay.c:980 check_overlay_scaling()
>     error: potential divide by zero bug '/ rec->dst_width'.
> 
> Prevent this by ensuring that the dst height and width are non-zero.
> 
> Fixes: 02e792fbaadb ("drm/i915: implement drmmode overlay support v4")
> Signed-off-by: Dan Carpenter <dan.carpenter at oracle.com>

Thanks. Pushed to drm-intel-next.

> ---
> >From static analysis.  Not tested.
> 
>  drivers/gpu/drm/i915/display/intel_overlay.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
> index 1a376e9a1ff3..d610e48cab94 100644
> --- a/drivers/gpu/drm/i915/display/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/display/intel_overlay.c
> @@ -959,6 +959,9 @@ static int check_overlay_dst(struct intel_overlay *overlay,
>  	const struct intel_crtc_state *pipe_config =
>  		overlay->crtc->config;
>  
> +	if (rec->dst_height == 0 || rec->dst_width == 0)
> +		return -EINVAL;
> +
>  	if (rec->dst_x < pipe_config->pipe_src_w &&
>  	    rec->dst_x + rec->dst_width <= pipe_config->pipe_src_w &&
>  	    rec->dst_y < pipe_config->pipe_src_h &&
> -- 
> 2.20.1

-- 
Ville Syrjälä
Intel