[Intel-gfx] [PATCH 6/9] drm/i915: Clean up PIPESRC defines

[Ville Syrjälä]

On Wed, Jan 26, 2022 at 04:42:52PM +0200, Jani Nikula wrote:
> On Fri, 12 Nov 2021, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Use REG_GENMASK() & co. when dealing with PIPESRC.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/i9xx_plane.c    | 4 ++--
> >  drivers/gpu/drm/i915/display/intel_display.c | 7 ++++---
> >  drivers/gpu/drm/i915/i915_reg.h              | 4 ++++
> >  3 files changed, 10 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> > index 2194f74101ae..f586e39cb378 100644
> > --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> > +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> > @@ -1048,8 +1048,8 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
> >  	plane_config->base = base;
> >  
> >  	val = intel_de_read(dev_priv, PIPESRC(pipe));
> > -	fb->width = ((val >> 16) & 0xfff) + 1;
> > -	fb->height = ((val >> 0) & 0xfff) + 1;
> 
> I guess the mask width change is worth noting in the commit message.

Aye. I added a few notes about this and the DSL stuff.

> 
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>

Thanks. Series pushed to drm-intel-next.

-- 
Ville Syrjälä
Intel