[Intel-gfx] [PATCH 06/15] drm/i915: Extract skl_crtc_calc_dbuf_bw()

[Lisovskiy, Stanislav]

On Tue, Jan 18, 2022 at 11:23:45AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Extract the dbuf slice data_rate calculation into a small
> helper. Should make it a bit easier to handle the different
> color planes of planar formats correctly.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 82 +++++++++++++------------
>  1 file changed, 44 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index c35bad21b657..f0d6fad048c7 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -672,6 +672,49 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state)
>  	return to_intel_bw_state(bw_state);
>  }
>  
> +static void skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state,
> +				  const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +	struct intel_dbuf_bw *crtc_bw = &bw_state->dbuf_bw[crtc->pipe];
> +	enum plane_id plane_id;
> +
> +	memset(&crtc_bw->used_bw, 0, sizeof(crtc_bw->used_bw));
> +
> +	if (!crtc_state->hw.active)
> +		return;
> +
> +	for_each_plane_id_on_crtc(crtc, plane_id) {
> +		const struct skl_ddb_entry *ddb_y =
> +			&crtc_state->wm.skl.plane_ddb_y[plane_id];
> +		const struct skl_ddb_entry *ddb_uv =
> +			&crtc_state->wm.skl.plane_ddb_uv[plane_id];
> +		unsigned int data_rate = crtc_state->data_rate[plane_id];
> +		unsigned int dbuf_mask = 0;
> +		enum dbuf_slice slice;
> +
> +		dbuf_mask |= skl_ddb_dbuf_slice_mask(i915, ddb_y);
> +		dbuf_mask |= skl_ddb_dbuf_slice_mask(i915, ddb_uv);
> +
> +		/*
> +		 * FIXME: To calculate that more properly we probably
> +		 * need to split per plane data_rate into data_rate_y
> +		 * and data_rate_uv for multiplanar formats in order not
> +		 * to get accounted those twice if they happen to reside
> +		 * on different slices.
> +		 * However for pre-icl this would work anyway because
> +		 * we have only single slice and for icl+ uv plane has
> +		 * non-zero data rate.
> +		 * So in worst case those calculation are a bit
> +		 * pessimistic, which shouldn't pose any significant
> +		 * problem anyway.
> +		 */
> +		for_each_dbuf_slice_in_mask(i915, slice, dbuf_mask)
> +			crtc_bw->used_bw[slice] += data_rate;
> +	}
> +}
> +
>  int skl_bw_calc_min_cdclk(struct intel_atomic_state *state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> @@ -684,50 +727,13 @@ int skl_bw_calc_min_cdclk(struct intel_atomic_state *state)
>  	int i;
>  
>  	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> -		enum plane_id plane_id;
> -		struct intel_dbuf_bw *crtc_bw;
> -
>  		new_bw_state = intel_atomic_get_bw_state(state);
>  		if (IS_ERR(new_bw_state))
>  			return PTR_ERR(new_bw_state);
>  
>  		old_bw_state = intel_atomic_get_old_bw_state(state);
>  
> -		crtc_bw = &new_bw_state->dbuf_bw[crtc->pipe];
> -
> -		memset(&crtc_bw->used_bw, 0, sizeof(crtc_bw->used_bw));
> -
> -		if (!crtc_state->hw.active)
> -			continue;
> -
> -		for_each_plane_id_on_crtc(crtc, plane_id) {
> -			const struct skl_ddb_entry *plane_alloc =
> -				&crtc_state->wm.skl.plane_ddb_y[plane_id];
> -			const struct skl_ddb_entry *uv_plane_alloc =
> -				&crtc_state->wm.skl.plane_ddb_uv[plane_id];
> -			unsigned int data_rate = crtc_state->data_rate[plane_id];
> -			unsigned int dbuf_mask = 0;
> -			enum dbuf_slice slice;
> -
> -			dbuf_mask |= skl_ddb_dbuf_slice_mask(dev_priv, plane_alloc);
> -			dbuf_mask |= skl_ddb_dbuf_slice_mask(dev_priv, uv_plane_alloc);
> -
> -			/*
> -			 * FIXME: To calculate that more properly we probably
> -			 * need to to split per plane data_rate into data_rate_y
> -			 * and data_rate_uv for multiplanar formats in order not
> -			 * to get accounted those twice if they happen to reside
> -			 * on different slices.
> -			 * However for pre-icl this would work anyway because
> -			 * we have only single slice and for icl+ uv plane has
> -			 * non-zero data rate.
> -			 * So in worst case those calculation are a bit
> -			 * pessimistic, which shouldn't pose any significant
> -			 * problem anyway.
> -			 */
> -			for_each_dbuf_slice_in_mask(dev_priv, slice, dbuf_mask)
> -				crtc_bw->used_bw[slice] += data_rate;
> -		}
> +		skl_crtc_calc_dbuf_bw(new_bw_state, crtc_state);
>  	}
>  
>  	if (!old_bw_state)
> -- 
> 2.32.0
>