[Intel-gfx] [PATCH v5 00/14] GSC support for XeHP SDV and DG2 platforms

[Rodrigo Vivi]

On Fri, Jul 08, 2022 at 03:34:43PM +0200, Greg Kroah-Hartman wrote:
> On Wed, Jul 06, 2022 at 02:43:31PM +0300, Alexander Usyskin wrote:
> > Add GSC support for XeHP SDV and DG2 platforms.
> > 
> > The series includes changes for the mei driver:
> > - add ability to use polling instead of interrupts
> > - add ability to use extended timeouts
> > - setup extended operational memory for GSC
> > 
> > The series includes changes for the i915 driver:
> > - allocate extended operational memory for GSC
> > - GSC on XeHP SDV offsets and definitions
> > 
> > Greg KH, please review and ACK the MEI patches.
> > We are pushing these patches through gfx tree as
> > the auxiliary device belongs there.
> > 
> > V2: rebase over merged DG1 series and DG2 enablement patch,
> >     fix commit messages
> > 
> > V3: rebase over latest tip
> > 
> > V4: add missed changelog in pxp dbugfs patch
> > 
> > V5: rebase over latest tip
> >     fix changelog in pxp dbugfs patch
> >     put HAX patch last to the ease of merging
> 
> You did more than just this from v4 to v5 :(
> 
> It's as if you want to make it hard to review these...

I just checked the code and it looks the same to me.

well, yeap, changing the order of other commits during the rebase
was not mentioned. So we don't know the reason...

But at least now the HAX is the last patch what makes more sense.

But I don't believe this should block the review and require a v6
just to add this comment in the cover letter, or it should?

Rodrigo.

> 
> greg k-h