[Intel-gfx] [PATCH] For execlists backend, current implementation of Wa_22011802037 is to stop the CS before doing a reset of the engine. This WA was further extended to wait for any pending MI FORCE WAKEUPs before issuing a reset. Add the extended steps in the execlist path of reset.

[Umesh Nerlige Ramappa]

Commit title messed up, please ignore this one.

Umesh

On Thu, Jun 09, 2022 at 05:24:54PM -0700, Nerlige Ramappa, Umesh wrote:
>From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
>
>In addition, extend the WA to gen11.
>
>v2: (Tvrtko)
>- Clarify comments, commit message, fix typos
>- Use IS_GRAPHICS_VER for gen 11/12 checks
>
>v3: (Daneile)
>- Drop changes to intel_ring_submission since WA does not apply to it
>- Log an error if MSG IDLE is not defined for an engine
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
>Fixes: f6aa0d713c88 ("drm/i915: Add Wa_22011802037 force cs halt")
>Acked-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>