[Intel-gfx] [PATCH] drm/i915: Add global forcewake status to drpc

Belgaumkar, Vinay vinay.belgaumkar at intel.com
Fri Jun 17 21:11:18 UTC 2022


On 6/17/2022 1:53 PM, Dixit, Ashutosh wrote:
> On Fri, 17 Jun 2022 13:25:34 -0700, Vinay Belgaumkar wrote:
>> We have seen multiple RC6 issues where it is useful to know
>> which global forcewake bits are set. Add this to the 'drpc'
>> debugfs output.
> A couple of optional nits below to look at but otherwise this is:
>
> Reviewed-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
>
>> +static u32 mt_fwake_status(struct intel_uncore *uncore)
>> +{
>> +	return intel_uncore_read_fw(uncore, FORCEWAKE_MT);
>> +}
>> +
>>   static int vlv_drpc(struct seq_file *m)
>>   {
>> 	struct intel_gt *gt = m->private;
>> 	struct intel_uncore *uncore = gt->uncore;
>> -	u32 rcctl1, pw_status;
>> +	u32 rcctl1, pw_status, mt_fwake;
>>
>> +	mt_fwake = mt_fwake_status(uncore);
> I would get rid of the function and just duplicate the intel_uncore_read_fw().
Made it a function in case we can find the equivalent register for ILK. 
Though, I am not sure if ILK even had the concept of MT fwake.
>
>> 	pw_status = intel_uncore_read(uncore, VLV_GTLC_PW_STATUS);
>> 	rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL);
>>
>> 	seq_printf(m, "RC6 Enabled: %s\n",
>> 		   str_yes_no(rcctl1 & (GEN7_RC_CTL_TO_MODE |
>> 					GEN6_RC_CTL_EI_MODE(1))));
>> +	seq_printf(m, "Multi-threaded Forcewake: 0x%x\n", mt_fwake);
> Is "Multi-threaded Forcewake Request" (the Bspec register name) a more
> descriptive print?
>
> Same for gen6_drpc() below. Thanks!

Sure.

Thanks,

Vinay.



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