[Intel-gfx] [PATCH 5/6] drm/i915/gt: Serialize GRDOM access between multiple engine resets

[Tvrtko Ursulin]

On 23/06/2022 12:17, Andi Shyti wrote:
> Hi Mauro,
> 
> On Wed, Jun 15, 2022 at 04:27:39PM +0100, Mauro Carvalho Chehab wrote:
>> From: Chris Wilson <chris.p.wilson at intel.com>
>>
>> Don't allow two engines to be reset in parallel, as they would both
>> try to select a reset bit (and send requests to common registers)
>> and wait on that register, at the same time. Serialize control of
>> the reset requests/acks using the uncore->lock, which will also ensure
>> that no other GT state changes at the same time as the actual reset.
>>
>> Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
>>
>> Reported-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
>> Cc: Andi Shyti <andi.shyti at intel.com>
>> Cc: stable at vger.kernel.org
>> Acked-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
>> Signed-off-by: Mauro Carvalho Chehab <mchehab at kernel.org>
> 
> Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>

Notice I had a bunch of questions and asks in this series so please do 
not merge until those are addressed.

In this particular patch (and some others) for instance Fixes: tag, at 
least against that sha, shouldn't be there.

Regards,

Tvrtko