[Intel-gfx] [PATCH v2] drm/i915/wm: use REG_FIELD_{PREP, GET} for PLANE_WM_BLOCKS_MASK

[Jani Nikula]

On Wed, 23 Feb 2022, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Wed, Feb 23, 2022 at 12:35:17PM +0200, Jani Nikula wrote:
>> Use REG_FIELD_{PREP,GET} for completeness, and to avoid bitwise
>> operations with different sizes.
>> 
>> v2: Also use REG_FIELD_GET in skl_wm_level_from_reg_val() (Ville)
>> 
>> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Pushed (yesterday), thanks for the review.

BR,
Jani.


>
>> ---
>>  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 5af16ca4dabd..f7fabcabf805 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -5930,7 +5930,7 @@ static void skl_write_wm_level(struct drm_i915_private *dev_priv,
>>  		val |= PLANE_WM_EN;
>>  	if (level->ignore_lines)
>>  		val |= PLANE_WM_IGNORE_LINES;
>> -	val |= level->blocks;
>> +	val |= REG_FIELD_PREP(PLANE_WM_BLOCKS_MASK, level->blocks);
>>  	val |= REG_FIELD_PREP(PLANE_WM_LINES_MASK, level->lines);
>>  
>>  	intel_de_write_fw(dev_priv, reg, val);
>> @@ -6578,7 +6578,7 @@ static void skl_wm_level_from_reg_val(u32 val, struct skl_wm_level *level)
>>  {
>>  	level->enable = val & PLANE_WM_EN;
>>  	level->ignore_lines = val & PLANE_WM_IGNORE_LINES;
>> -	level->blocks = val & PLANE_WM_BLOCKS_MASK;
>> +	level->blocks = REG_FIELD_GET(PLANE_WM_BLOCKS_MASK, val);
>>  	level->lines = REG_FIELD_GET(PLANE_WM_LINES_MASK, val);
>>  }
>>  
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center