[Intel-gfx] [PATCH v2 6/8] drm/i915: Fix PSF GV point mask when SAGV is not possible

[Ville Syrjälä]

On Wed, Mar 09, 2022 at 08:59:59PM +0200, Lisovskiy, Stanislav wrote:
> On Wed, Mar 09, 2022 at 06:49:46PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Don't just mask off all the PSF GV points when SAGV gets disabled.
> > This should in fact cause the Pcode to reject the request since
> > at least one PSF point must remain enabled at all times.
> 
> Good point, however I think this is not the full fix:
> 
> BSpec says:
> 
> "At least one GV point of each type must always remain unmasked."
> 
> and
> 
> "The GV point of each type providing the highest bandwidth 
>  for display must always remain unmasked."
> 
> So I guess we should then also choose thr PSF GV point with
> the highest bandwidth as well.

The spec says PSF GV is fast enough to now stall the display data
fetch so we don't need to restrict the PSF points here.

-- 
Ville Syrjälä
Intel