[Intel-gfx] [PATCH] drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header

[Jani Nikula]

On Thu, 10 Mar 2022, Matt Roper <matthew.d.roper at intel.com> wrote:
> We shouldn't really be keeping track of how many SFC_DONE registers
> our platforms can have, but rather how many SFC hardware units there can
> be (each SFC unit will have one corresponding SFC_DONE register).  So
> drop the stray GEN12_SFC_DONE_MAX definition we had in the register
> definition file and replace it with an I915_MAX_SFC that follows the
> pattern we use for other hardware units.  Note that our hardware has a
> 2:1:1 ratio of VD:VE:SFC, and as far as we know that pattern should
> carry forward to future platforms, so we'll define it as #VCS/2.
>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>

Thanks!

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 +
>  drivers/gpu/drm/i915/i915_gpu_error.c        | 4 ++--
>  drivers/gpu/drm/i915/i915_gpu_error.h        | 2 +-
>  drivers/gpu/drm/i915/i915_reg_defs.h         | 2 --
>  4 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index f9e246004bc0..eac20112709c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -96,6 +96,7 @@ struct i915_ctx_workarounds {
>  
>  #define I915_MAX_VCS	8
>  #define I915_MAX_VECS	4
> +#define I915_MAX_SFC	(I915_MAX_VCS / 2)
>  #define I915_MAX_CCS	4
>  #define I915_MAX_RCS	1
>  
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 44ff2b899893..a8acc6fbb299 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -754,7 +754,7 @@ static void err_print_gt(struct drm_i915_error_state_buf *m,
>  	if (GRAPHICS_VER(m->i915) >= 12) {
>  		int i;
>  
> -		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
> +		for (i = 0; i < I915_MAX_SFC; i++) {
>  			/*
>  			 * SFC_DONE resides in the VD forcewake domain, so it
>  			 * only exists if the corresponding VCS engine is
> @@ -1691,7 +1691,7 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
>  		gt->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG);
>  
>  	if (GRAPHICS_VER(i915) >= 12) {
> -		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
> +		for (i = 0; i < I915_MAX_SFC; i++) {
>  			/*
>  			 * SFC_DONE resides in the VD forcewake domain, so it
>  			 * only exists if the corresponding VCS engine is
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
> index 903d838e2e63..c3ccc8266865 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.h
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.h
> @@ -137,7 +137,7 @@ struct intel_gt_coredump {
>  	u32 gfx_mode;
>  	u32 gtt_cache;
>  	u32 aux_err; /* gen12 */
> -	u32 sfc_done[GEN12_SFC_DONE_MAX]; /* gen12 */
> +	u32 sfc_done[I915_MAX_SFC]; /* gen12 */
>  	u32 gam_done; /* gen12 */
>  
>  	u32 nfence;
> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
> index d78d78fce431..8f486f77609f 100644
> --- a/drivers/gpu/drm/i915/i915_reg_defs.h
> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h
> @@ -123,6 +123,4 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>  
>  #define VLV_DISPLAY_BASE		0x180000
>  
> -#define GEN12_SFC_DONE_MAX		4
> -
>  #endif /* __I915_REG_DEFS__ */

-- 
Jani Nikula, Intel Open Source Graphics Center