[Intel-gfx] [PULL] drm-intel-next-fixes

[Tvrtko Ursulin]

Hi Dave, Daniel,

A few fixes for the merge window.

Apart from a uninteresting rename of a field in an unused macro, the rest
are display fixes - two for SAGV and one for TDMS rate calculation on
Icelake and above.

Regards,

Tvrtko

drm-intel-next-fixes-2022-03-24:
- Reject unsupported TMDS rates on ICL+ (Ville Syrjälä)
- Treat SAGV block time 0 as SAGV disabled (Ville Syrjälä)
- Fix PSF GV point mask when SAGV is not possible (Ville Syrjälä)
- Fix renamed INTEL_INFO->media.arch/ver field (Lucas De Marchi)
The following changes since commit 278da06c03655c2bb9bc36ebdf45b90a079b3bfd:

  drm/i915/display: Do not re-enable PSR after it was marked as not reliable (2022-03-16 08:17:40 +0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-fixes-2022-03-24

for you to fetch changes up to 00f4150d27d2c01eaeffe1091fc311a7c0872c69:

  drm/i915: Fix renamed struct field (2022-03-21 11:48:00 +0000)

----------------------------------------------------------------
- Reject unsupported TMDS rates on ICL+ (Ville Syrjälä)
- Treat SAGV block time 0 as SAGV disabled (Ville Syrjälä)
- Fix PSF GV point mask when SAGV is not possible (Ville Syrjälä)
- Fix renamed INTEL_INFO->media.arch/ver field (Lucas De Marchi)

----------------------------------------------------------------
Lucas De Marchi (1):
      drm/i915: Fix renamed struct field

Ville Syrjälä (3):
      drm/i915: Reject unsupported TMDS rates on ICL+
      drm/i915: Treat SAGV block time 0 as SAGV disabled
      drm/i915: Fix PSF GV point mask when SAGV is not possible

 drivers/gpu/drm/i915/display/intel_bw.c   |  3 ++-
 drivers/gpu/drm/i915/display/intel_hdmi.c |  9 +++++++++
 drivers/gpu/drm/i915/i915_drv.h           |  2 +-
 drivers/gpu/drm/i915/intel_pm.c           | 10 ++++++----
 4 files changed, 18 insertions(+), 6 deletions(-)