[Intel-gfx] [PATCH 08/13] drm/i915: Split out dg2_crtc_compute_clock()

Jani Nikula jani.nikula at linux.intel.com
Mon Mar 28 11:07:21 UTC 2022


On Fri, 25 Mar 2022, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> DG2 doesn't currently used the shared_dpll stuff so let's just
> split it out from hsw_crtc_compute_clock() entirely.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dpll.c | 22 ++++++++++++++++++----
>  1 file changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 7960f1d52eaa..bc59efe18e89 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -938,9 +938,6 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state,
>  		intel_get_crtc_new_encoder(state, crtc_state);
>  	int ret;
>  
> -	if (IS_DG2(dev_priv))
> -		return intel_mpllb_calc_state(crtc_state, encoder);
> -
>  	if (DISPLAY_VER(dev_priv) < 11 &&
>  	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
>  		return 0;
> @@ -956,6 +953,17 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state,
>  	return 0;
>  }
>  
> +static int dg2_crtc_compute_clock(struct intel_atomic_state *state,
> +				  struct intel_crtc *crtc)
> +{
> +	struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	struct intel_encoder *encoder =
> +		intel_get_crtc_new_encoder(state, crtc_state);
> +
> +	return intel_mpllb_calc_state(crtc_state, encoder);
> +}
> +
>  static bool ilk_needs_fb_cb_tune(const struct dpll *dpll, int factor)
>  {
>  	return dpll->m < factor * dpll->n;
> @@ -1362,6 +1370,10 @@ static int i8xx_crtc_compute_clock(struct intel_atomic_state *state,
>  	return 0;
>  }
>  
> +static const struct intel_dpll_funcs dg2_dpll_funcs = {
> +	.crtc_compute_clock = dg2_crtc_compute_clock,
> +};
> +
>  static const struct intel_dpll_funcs hsw_dpll_funcs = {
>  	.crtc_compute_clock = hsw_crtc_compute_clock,
>  };
> @@ -1418,7 +1430,9 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
>  void
>  intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv)
>  {
> -	if (DISPLAY_VER(dev_priv) >= 9 || HAS_DDI(dev_priv))
> +	if (IS_DG2(dev_priv))
> +		dev_priv->dpll_funcs = &dg2_dpll_funcs;
> +	else if (DISPLAY_VER(dev_priv) >= 9 || HAS_DDI(dev_priv))
>  		dev_priv->dpll_funcs = &hsw_dpll_funcs;
>  	else if (HAS_PCH_SPLIT(dev_priv))
>  		dev_priv->dpll_funcs = &ilk_dpll_funcs;

-- 
Jani Nikula, Intel Open Source Graphics Center


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