[Intel-gfx] [PATCH 2/4] drm/i915: Make ilk+ pfit regiser unlocked

[Lisovskiy, Stanislav]

On Thu, Feb 24, 2022 at 06:51:01PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> The ilk+ panel fitter register are sitting nicely on their own
> cacheline, so no need for global serialization via uncore.lock.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7bf24df20b14..705f23be409c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1114,13 +1114,13 @@ static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
>  	 * e.g. x201.
>  	 */
>  	if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv))
> -		intel_de_write(dev_priv, PF_CTL(pipe), PF_ENABLE |
> -			       PF_FILTER_MED_3x3 | PF_PIPE_SEL_IVB(pipe));
> +		intel_de_write_fw(dev_priv, PF_CTL(pipe), PF_ENABLE |
> +				  PF_FILTER_MED_3x3 | PF_PIPE_SEL_IVB(pipe));
>  	else
> -		intel_de_write(dev_priv, PF_CTL(pipe), PF_ENABLE |
> -			       PF_FILTER_MED_3x3);
> -	intel_de_write(dev_priv, PF_WIN_POS(pipe), x << 16 | y);
> -	intel_de_write(dev_priv, PF_WIN_SZ(pipe), width << 16 | height);
> +		intel_de_write_fw(dev_priv, PF_CTL(pipe), PF_ENABLE |
> +				  PF_FILTER_MED_3x3);
> +	intel_de_write_fw(dev_priv, PF_WIN_POS(pipe), x << 16 | y);
> +	intel_de_write_fw(dev_priv, PF_WIN_SZ(pipe), width << 16 | height);
>  }
>  
>  static void intel_crtc_dpms_overlay_disable(struct intel_crtc *crtc)
> @@ -2022,9 +2022,9 @@ void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state)
>  	if (!old_crtc_state->pch_pfit.enabled)
>  		return;
>  
> -	intel_de_write(dev_priv, PF_CTL(pipe), 0);
> -	intel_de_write(dev_priv, PF_WIN_POS(pipe), 0);
> -	intel_de_write(dev_priv, PF_WIN_SZ(pipe), 0);
> +	intel_de_write_fw(dev_priv, PF_CTL(pipe), 0);
> +	intel_de_write_fw(dev_priv, PF_WIN_POS(pipe), 0);
> +	intel_de_write_fw(dev_priv, PF_WIN_SZ(pipe), 0);
>  }
>  
>  static void ilk_crtc_disable(struct intel_atomic_state *state,
> -- 
> 2.34.1
>