[Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Explicit handling of multicast registers

[Patchwork]

== Series Details ==

Series: i915: Explicit handling of multicast registers
URL   : https://patchwork.freedesktop.org/series/101992/
State : failure

== Summary ==

Applying: drm/i915/gen8: Create separate reg definitions for new MCR registers
Applying: drm/i915/xehp: Create separate reg definitions for new MCR registers
Applying: drm/i915/gt: Drop a few unused register definitions
Applying: drm/i915/gt: Correct prefix on a few registers
Applying: drm/i915/xehp: Check for faults on all mslices
Applying: drm/i915: Drop duplicated definition of XEHPSDV_FLAT_CCS_BASE_ADDR
Applying: drm/i915: Move XEHPSDV_TILE0_ADDR_RANGE to GT register header
Applying: drm/i915: Define MCR registers explicitly
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/gt/intel_gt_regs.h).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0008 drm/i915: Define MCR registers explicitly
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".