[Intel-gfx] [PATCH v3] drm/i915: Handle the DG2 max bw properly

[Ville Syrjälä]

On Tue, Mar 29, 2022 at 02:00:00AM +0300, Vinod Govindapillai wrote:
> Update DG2 init bw info similar to other platforms even though
> DG2 has constant bandwidh. This will avoid branching out DG2
> specific max bw calls.
> 
> V3: Fix dg2_get_bw_info() and avoid handle special cases
>     for DG2 (Ville Syrjälä)
> 
> cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> 
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai at intel.com>

Thanks. Pushed.

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 25 +++++++++++++++----------
>  1 file changed, 15 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index ac11ff19e47d..3a39600a75a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -464,20 +464,25 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel
>  
>  static void dg2_get_bw_info(struct drm_i915_private *i915)
>  {
> -	struct intel_bw_info *bi = &i915->max_bw[0];
> +	unsigned int deratedbw = IS_DG2_G11(i915) ? 38000 : 50000;
> +	int num_groups = ARRAY_SIZE(i915->max_bw);
> +	int i;
>  
>  	/*
>  	 * DG2 doesn't have SAGV or QGV points, just a constant max bandwidth
> -	 * that doesn't depend on the number of planes enabled.  Create a
> -	 * single dummy QGV point to reflect that.  DG2-G10 platforms have a
> -	 * constant 50 GB/s bandwidth, whereas DG2-G11 platforms have 38 GB/s.
> +	 * that doesn't depend on the number of planes enabled. So fill all the
> +	 * plane group with constant bw information for uniformity with other
> +	 * platforms. DG2-G10 platforms have a constant 50 GB/s bandwidth,
> +	 * whereas DG2-G11 platforms have 38 GB/s.
>  	 */
> -	bi->num_planes = 1;
> -	bi->num_qgv_points = 1;
> -	if (IS_DG2_G11(i915))
> -		bi->deratedbw[0] = 38000;
> -	else
> -		bi->deratedbw[0] = 50000;
> +	for (i = 0; i < num_groups; i++) {
> +		struct intel_bw_info *bi = &i915->max_bw[i];
> +
> +		bi->num_planes = 1;
> +		/* Need only one dummy QGV point per group */
> +		bi->num_qgv_points = 1;
> +		bi->deratedbw[0] = deratedbw;
> +	}
>  
>  	i915->sagv_status = I915_SAGV_NOT_CONTROLLED;
>  }
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel