[Intel-gfx] [PATCH] drm/i915/guc: Support programming the EU priority in the GuC descriptor
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Wed May 4 07:07:44 UTC 2022
On 04/05/2022 02:06, Ceraolo Spurio, Daniele wrote:
>
>
> On 5/3/2022 5:44 PM, Daniele Ceraolo Spurio wrote:
>> From: Matthew Brost <matthew.brost at intel.com>
>>
>> The EU priority register must be updated by the GuC rather than the
>> driver as it is context specific and only the GuC knows which context
>> is currently executing.
>>
>> Cc: John Harrison <john.c.harrison at intel.com>
>> Cc: Matt Roper <matthew.d.roper at intel.com>
>> Signed-off-by: Matthew Brost <matthew.brost at intel.com>
>> Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty at intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> index 75291e9846c50..8f3ed60ff07d9 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> @@ -2420,6 +2420,8 @@ static void
>> prepare_context_registration_info(struct intel_context *ce,
>> */
>> info->hwlrca_lo = lower_32_bits(ce->lrc.lrca);
>> info->hwlrca_hi = upper_32_bits(ce->lrc.lrca);
>> + if (engine->flags & I915_ENGINE_HAS_EU_PRIORITY)
>> + info->hwlrca_lo |= lrc_desc_priority(ce->guc_state.prio);
>
> Just realized that I forgot to squash in a change when I moved branch
> (guc_state.prio is the GuC-side value while lrc_desc_priority expects
> the i915 one). Ignore this, will fix up and re-send later.
Is there any Fixes: or stable needed to tie it together with something?
Regards,
Tvrtko
>
> Daniele
>
>> info->flags = CONTEXT_REGISTRATION_FLAG_KMD;
>> /*
>
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