[Intel-gfx] [PATCH 09/26] drm/i915: Improve modeset debugs
Jani Nikula
jani.nikula at linux.intel.com
Mon May 16 12:41:14 UTC 2022
On Tue, 03 May 2022, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Use the "[CRTC:%d:%s]'/etc. format for some of the modeset debugs
> so we know more about what has happened during the modeset state
> computation.
>
> Also tweak the connector bpp debug message a bit to make it less
> confusing.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 22 +++++++++++++-------
> 1 file changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ac476976dc0b..8d6cbfbaf20d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5040,8 +5040,8 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
>
> if (bpp < crtc_state->pipe_bpp) {
> drm_dbg_kms(&i915->drm,
> - "[CONNECTOR:%d:%s] Limiting display bpp to %d instead of "
> - "EDID bpp %d, requested bpp %d, max platform bpp %d\n",
> + "[CONNECTOR:%d:%s] Limiting display bpp to %d "
> + "(EDID bpp %d, max requested bpp %d, max platform bpp %d)\n",
> connector->base.id, connector->name,
> bpp, 3 * info->bpc,
> 3 * conn_state->max_requested_bpc,
> @@ -5691,7 +5691,8 @@ intel_modeset_pipe_config(struct intel_atomic_state *state,
>
> if (!check_single_encoder_cloning(state, crtc, encoder)) {
> drm_dbg_kms(&i915->drm,
> - "rejecting invalid cloning configuration\n");
> + "[ENCODER:%d:%s] rejecting invalid cloning configuration\n",
> + encoder->base.base.id, encoder->base.name);
> return -EINVAL;
> }
>
> @@ -5732,7 +5733,8 @@ intel_modeset_pipe_config(struct intel_atomic_state *state,
> if (ret == -EDEADLK)
> return ret;
> if (ret < 0) {
> - drm_dbg_kms(&i915->drm, "Encoder config failure: %d\n", ret);
> + drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] config failure: %d\n",
> + encoder->base.base.id, encoder->base.name, ret);
> return ret;
> }
> }
> @@ -5748,15 +5750,18 @@ intel_modeset_pipe_config(struct intel_atomic_state *state,
> return ret;
> if (ret == -EAGAIN) {
> if (drm_WARN(&i915->drm, !retry,
> - "loop in pipe configuration computation\n"))
> + "[CRTC:%d:%s] loop in pipe configuration computation\n",
> + crtc->base.base.id, crtc->base.name))
> return -EINVAL;
>
> - drm_dbg_kms(&i915->drm, "CRTC bw constrained, retrying\n");
> + drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] bw constrained, retrying\n",
> + crtc->base.base.id, crtc->base.name);
> retry = false;
> goto encoder_retry;
> }
> if (ret < 0) {
> - drm_dbg_kms(&i915->drm, "CRTC config failure: %d\n", ret);
> + drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] config failure: %d\n",
> + crtc->base.base.id, crtc->base.name, ret);
> return ret;
> }
>
> @@ -5767,7 +5772,8 @@ intel_modeset_pipe_config(struct intel_atomic_state *state,
> crtc_state->dither = (crtc_state->pipe_bpp == 6*3) &&
> !crtc_state->dither_force_disable;
> drm_dbg_kms(&i915->drm,
> - "hw max bpp: %i, pipe bpp: %i, dithering: %i\n",
> + "[CRTC:%d:%s] hw max bpp: %i, pipe bpp: %i, dithering: %i\n",
> + crtc->base.base.id, crtc->base.name,
> base_bpp, crtc_state->pipe_bpp, crtc_state->dither);
>
> return 0;
--
Jani Nikula, Intel Open Source Graphics Center
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