[Intel-gfx] [PATCH 1/2] drm/i915/display: Add smem fallback allocation for dpt

Matthew Auld matthew.william.auld at gmail.com
Fri May 20 11:45:38 UTC 2022


On Fri, 20 May 2022 at 12:23, Juha-Pekka Heikkilä
<juhapekka.heikkila at gmail.com> wrote:
>
>
>
> Matthew Auld kirjoitti 11.5.2022 klo 13.41:
> > On Fri, 6 May 2022 at 14:11, Juha-Pekka Heikkila
> > <juhapekka.heikkila at gmail.com> wrote:
> >>
> >> Add fallback smem allocation for dpt if stolen memory allocation failed.
> >>
> >> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> >> ---
> >>   drivers/gpu/drm/i915/display/intel_dpt.c | 16 ++++++++++++----
> >>   1 file changed, 12 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
> >> index fb0e7e79e0cd..10008699656e 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dpt.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dpt.c
> >> @@ -10,6 +10,7 @@
> >>   #include "intel_display_types.h"
> >>   #include "intel_dpt.h"
> >>   #include "intel_fb.h"
> >> +#include "gem/i915_gem_internal.h"
> >
> > Nit: Keep these ordered.
> >
> >>
> >>   struct i915_dpt {
> >>          struct i915_address_space vm;
> >> @@ -128,6 +129,10 @@ struct i915_vma *intel_dpt_pin(struct i915_address_space *vm)
> >>          void __iomem *iomem;
> >>          struct i915_gem_ww_ctx ww;
> >>          int err;
> >> +       u64 pin_flags = 0;
> >
> > Nit: Christmas tree-ish. Move this above the err.
> >
> >> +
> >> +       if (!i915_gem_object_is_lmem(dpt->obj))
> >> +               pin_flags |= PIN_MAPPABLE;
> >
> > If we do this then we don't need the second patch ;)
> >
> > I guess the second patch was meant to make this is_stolen? Maybe just
> > move the second patch to be the first in the series?
> >
>
> Hi Matthew, thanks for the comments. I think I'm still missing some
> essential part. Without marking PIN_MAPPABLE when !lmem I was hitting
> WARN_ON() in gem code when doing this pinning.

What was the WARN_ON? Got a paste?


More information about the Intel-gfx mailing list