[Intel-gfx] [PATCH 17/26] drm/i915: Set active dpll early for icl+

[Jani Nikula]

On Tue, 03 May 2022, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> To make the fastboot checks at least somewhat sensible let's mark
> the expected DPLL as the active one right after we finished the
> state computation. Otherwise intel_pipe_config_compare() will
> always be comparing things against NULL/0.
>
> TODO: This is still not really right. If the previous commit
> had to fall back to the other PLL then the comparisong will
> now fail. I guess intel_pipe_config_compare() should rather
> be comparing port_dplls[] instead. But to do that we really
> should just unify every platform to use the port_dplls[]
> approach whether they have any need for PLL fallbacks or not.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Acked-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 416d78f9e140..6564d7baf978 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -3225,6 +3225,9 @@ static int icl_compute_combo_phy_dpll(struct intel_atomic_state *state,
>  
>  	icl_calc_dpll_state(dev_priv, &pll_params, &port_dpll->hw_state);
>  
> +	/* this is mainly for the fastset check */
> +	icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);
> +
>  	crtc_state->port_clock = icl_ddi_combo_pll_get_freq(dev_priv, NULL,
>  							    &port_dpll->hw_state);
>  
> @@ -3313,6 +3316,9 @@ static int icl_compute_tc_phy_dplls(struct intel_atomic_state *state,
>  	if (ret)
>  		return ret;
>  
> +	/* this is mainly for the fastset check */
> +	icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY);
> +
>  	crtc_state->port_clock = icl_ddi_mg_pll_get_freq(dev_priv, NULL,
>  							 &port_dpll->hw_state);

-- 
Jani Nikula, Intel Open Source Graphics Center