[Intel-gfx] [PATCH 5/6] drm/i915/bios: Define more BDB contents

[Ville Syrjälä]

On Mon, May 30, 2022 at 03:55:52PM +0300, Jani Nikula wrote:
> On Fri, 27 May 2022, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Add a bunch of new struff we're missing in various BDB blocks.
> >
> > TODO: Bunch of these might actually need to be taken
> > into use...
> 
> Cc: Jouni, Lyude for some HDR backlight stuff below.
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_vbt_defs.h | 50 ++++++++++++++++---
> >  1 file changed, 43 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > index 39109f204c6d..be99f585b1d0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > @@ -564,7 +564,9 @@ struct bdb_driver_features {
> >  	u16 tbt_enabled:1;
> >  	u16 psr_enabled:1;
> >  	u16 ips_enabled:1;
> > -	u16 reserved3:4;
> > +	u16 reserved3:1;
> > +	u16 dmrrs_enabled:1;
> 
> Should we start logging the version ranges here too, since it's obsolete
> from 228. Kinda duplicating the info though. *shrug*.
> 
> > +	u16 reserved4:2;
> >  	u16 pc_feature_valid:1;
> >  } __packed;
> >  
> > @@ -666,6 +668,16 @@ struct edp_full_link_params {
> >  	u8 vswing:4;
> >  } __packed;
> >  
> > +struct edp_apical_params {
> > +	u32 panel_oui;
> > +	u32 dpcd_base_address;
> > +	u32 dpcd_idridix_control_0;
> > +	u32 dpcd_option_select;
> > +	u32 dpcd_backlight;
> > +	u32 ambient_light;
> > +	u32 backlight_scale;
> > +} __packed;
> > +
> >  struct bdb_edp {
> >  	struct edp_power_seq power_seqs[16];
> >  	u32 color_depth;
> > @@ -681,6 +693,9 @@ struct bdb_edp {
> >  	struct edp_pwm_delays pwm_delays[16];			/* 186 */
> >  	u16 full_link_params_provided;				/* 199 */
> >  	struct edp_full_link_params full_link_params[16];	/* 199 */
> > +	u16 apical_enable;					/* 203 */
> > +	struct edp_apical_params apical_params[16];		/* 203 */
> > +	u16 edp_fast_link_training_rate[16];			/* 224 */
> 
> Another eDP port link rate param would go here? Could be added in
> another patch.

LOL+sigh. There is already a max link rate in the child dev but
naturally it's only specified using three bits so it's not in any
way future proof, or even capable of handling intermediate link rates.
I suppose that is the reason they added this second thing.

Oh and there's also two ways to specify the fast link training
rate as well. Man, I love VBT.

I was going to type up a quick patch but looks like there's
another chicken vs. egg situation due to panel_type again.
That is, we currently do the set_*_rates() stuff before the
per-panel VBT parsing. So I'll need to figure out if there's
anything preventing us from initializing the source rates
after the per-panel VBT parsing has been done...

-- 
Ville Syrjälä
Intel