[Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0

[Usyskin, Alexander]

> > >
> > > It looks to me that we need to move the gsc out of the intel_gt instead of
> > > workaround the initialization.
> >
> > The interrupts are handled by gt, so where this should go ?
> >
> 
> Ouch, I've seen it now. But still this patch brings me more doubts...
> 
> is gsc really a per-gt thing? if not why the gsc irq is in the gt domain?
> if yes why the one in the second tile not operational?
> 
> if it is not a per-tile thing and only the irq is in a bad spot we could
> still move it outside gt and make the irq to be redirected.
> 
> well, if it is really a per tile thing but it is fused of, do we have hw
> ways to detect that?
> 
> if it is really a tile thing and we don't have better ways to identify
> we might want to do with this patch, but add a bit more information on the
> reasons and also double checking if by avoiding the initialization we are
> sure that we are not going to reach any case of attempting to utilize the
> un-initialized gsc.

The GSC is present on all tiles but functional only on the first one.
There is no way to detect if GSC is functional per-tile.

Good point about double check, we have also interrupt handler.
Should not fire without GSC running, but better to protect here too.

We have code that skip initialization of one of the heads provided by GSC.
I'll utilize the same path to disable here, so that should be safe and already broadly tested.
Will publish new version soon.

--
Alexander (Sasha) Usyskin

CSE FW Dev - Host SW
Intel Israel (74) Limited