[Intel-gfx] [PATCH v2 00/18] drm/i915: Finish (de)gamma readout
Ville Syrjala
ville.syrjala at linux.intel.com
Thu Nov 10 08:21:26 UTC 2022
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
The gamma readout stuff was left half finished. No degamma
readout, and no readout whatsoever on ivb/bdw/skl/bxt.
Let's finish it.
Since we have the {pre,post}_csc_lut stuff this is fairly
easy to do now. The implementation of the LUT checker is
a bit more repetitive than I'd like but we an work on
shrinking it later.
There are some fixes/cleanups at the start, and while we're
in there let's also throw in the 10bit gamma mode for gen2/3.
At the end I also added a few patches to fix existing issues
with gamma vs. YCbCr/RGB limited range output.
v2: Mostly redone, only some of the readout implementations
remain more or less unchanged
Ville Syrjälä (18):
drm/i915: Clean up legacy palette defines
drm/i915: Clean up 10bit precision palette defines
drm/i915: Clean up 12.4bit precision palette defines
drm/i915: Clean up chv CGM (de)gamma defines
drm/i915: Reorder 12.4 lut udw vs. ldw functions
drm/i915: Fix adl+ degamma LUT size
drm/i915: Add glk+ degamma readout
drm/i915: Read out CHV CGM degamma
drm/i915: Add gamma/degamma readout for bdw+
drm/i915: Add gamma/degamma readout for ivb/hsw
drm/i915: Make ilk_read_luts() capable of degamma readout
drm/i915: Make .read_luts() mandatory
drm/i915: Finish the LUT state checker
drm/i915: Rework legacy LUT handling
drm/i915: Use hw degamma LUT for sw gamma on glk with YCbCr output
drm/i915: Use gamma LUT for RGB limited range compression
drm/i915: Add 10bit gamma mode for gen2/3
drm/i915: Do state check for color management changes
drivers/gpu/drm/i915/display/intel_color.c | 1082 ++++++++++++++---
drivers/gpu/drm/i915/display/intel_color.h | 8 +-
drivers/gpu/drm/i915/display/intel_display.c | 33 +-
.../drm/i915/display/intel_modeset_verify.c | 1 +
drivers/gpu/drm/i915/i915_pci.c | 12 +-
drivers/gpu/drm/i915/i915_reg.h | 67 +-
6 files changed, 965 insertions(+), 238 deletions(-)
--
2.37.4
More information about the Intel-gfx
mailing list