[Intel-gfx] [PATCH] drm/i915/display: Add missing checks for cdclk crawling

[Srivatsa, Anusha]

> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Sent: Friday, November 11, 2022 11:40 AM
> To: Srivatsa, Anusha <anusha.srivatsa at intel.com>
> Cc: intel-gfx at lists.freedesktop.org; Roper, Matthew D
> <matthew.d.roper at intel.com>
> Subject: Re: [PATCH] drm/i915/display: Add missing checks for cdclk crawling
> 
> On Fri, Nov 11, 2022 at 11:26:02AM -0800, Anusha Srivatsa wrote:
> > cdclk_sanitize() function was written assuming vco was a signed integer.
> > vco gets assigned to -1 (essentially ~0) for the case where PLL might
> > be enabled and vco is not a frequency that will ever get used. In such
> > a scenario the right thing to do is disable the PLL and re-enable it
> > again with a valid frequency.
> > However the vco is declared as a unsigned variable.
> > With the above assumption, driver takes crawl path when not needed.
> > Add explicit check to not crawl in the case of an invalid PLL.
> >
> > v2: Move the check from .h to .c (MattR)
> > - Move check to bxt_set_cdclk() instead of
> > intel_modeset_calc_cdclk() which is directly in the path of the
> > sanitize() function (Ville)
> >
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Cc: Matt Roper <matthew.d.roper at intel.com>
> > Suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cdclk.c | 13 ++++++++++++-
> >  1 file changed, 12 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 8a9031012d74..2d9b7ba58358 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1716,6 +1716,16 @@ static void dg2_cdclk_squash_program(struct
> drm_i915_private *i915,
> >  	intel_de_write(i915, CDCLK_SQUASH_CTL, squash_ctl);  }
> >
> > +static bool cdclk_pll_is_unknown(unsigned int vco) {
> > +	/*
> > +	 * Ensure driver does not take the crawl path for the
> > +	 * case when the vco is set to ~0 in the
> > +	 * sanitize path.
> > +	 */
> > +	return (vco == ~0);
> 
> Pointless parens.
> 
> > +}
> > +
> >  static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> >  			  const struct intel_cdclk_config *cdclk_config,
> >  			  enum pipe pipe)
> > @@ -1748,7 +1758,8 @@ static void bxt_set_cdclk(struct drm_i915_private
> *dev_priv,
> >  		return;
> >  	}
> >
> > -	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco
> > 0 && vco > 0) {
> > +	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco
> > 0 && vco > 0 &&
> > +	    (!cdclk_pll_is_unknown(dev_priv->display.cdclk.hw.vco))) {
> 
> More pointless parens
> 
> With those removed
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Thanks Ville.

> Though I think we should probably add the pll_is_enabled() helper too, just
> make the code a bit more self explanatory.

At this point the current code should atleast not block the MTL cdclk churn series. But the suggested helper will make the code more explanatory and I can take it up.
Thanks for the feedback!

Anusha
 
> >  		if (dev_priv->display.cdclk.hw.vco != vco)
> >  			adlp_cdclk_pll_crawl(dev_priv, vco);
> >  	} else if (DISPLAY_VER(dev_priv) >= 11)
> > --
> > 2.25.1
> 
> --
> Ville Syrjälä
> Intel