[Intel-gfx] [PATCH v2] drm/i915/gsc: Only initialize GSC in tile 0

[Tvrtko Ursulin]

On 21/11/2022 09:35, Winkler, Tomas wrote:
>>
>> From: José Roberto de Souza <jose.souza at intel.com>
>>
>> For multi-tile setups the GSC operational only on the tile 0.
>> Skip GSC auxiliary device creation for all other tiles in GSC device init code.
>> Initialize basic GSC fields and use the same path as HECI1 (HECI_PXP) device
>> disable.
>>
>> Cc: Tomas Winkler <tomas.winkler at intel.com>
>> Cc: Vitaly Lubart <vitaly.lubart at intel.com>
>> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
>> Signed-off-by: Alexander Usyskin <alexander.usyskin at intel.com>
> 
> Acked-by: Tomas Winkler <tomas.winkler at intel.com>

Feel free to upgrade to r-b so someone can merge it. :)

>> ---
>> V2: Move decision to skip initialization into GSC device init code.
>>      This initializes basic GSC fields and uses the same path
>>      as HECI1 (HECI_PXP) device disable.
>>      It is simpler and protects interrupt handler too.
>>
>>   drivers/gpu/drm/i915/gt/intel_gsc.c | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c
>> b/drivers/gpu/drm/i915/gt/intel_gsc.c
>> index 976fdf27e790..bcc3605158db 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gsc.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
>> @@ -174,6 +174,14 @@ static void gsc_init_one(struct drm_i915_private
>> *i915, struct intel_gsc *gsc,
>>   	intf->irq = -1;
>>   	intf->id = intf_id;
>>
>> +	/*
>> +	 * On the multi-tile setups the GSC is functional on the first tile only
>> +	 */
>> +	if (gsc_to_gt(gsc)->info.id != 0) {
>> +		drm_dbg(&i915->drm, "Not initializing gsc for remote
>> tiles\n");

Is there any value of adding a log message for this? I don't immediately 
see that it is worth it, but your call.

Regards,

Tvrtko

>> +		return;
>> +	}
>> +
>>   	if (intf_id == 0 && !HAS_HECI_PXP(i915))
>>   		return;
>>
>> --
>> 2.34.1
>