[Intel-gfx] [PATCH v1] drm/ttm: Clean up page shift operation

[Christian König]

Am 22.11.22 um 08:51 schrieb Somalapuram Amaranath:
> Remove page shift operations as ttm_resource moved
> from num_pages to size_t size in bytes.
> v1 -> v2: fix missing page shift to fpfn and lpfn
>
> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  4 +---
>   drivers/gpu/drm/ttm/ttm_range_manager.c    | 13 ++++++-------
>   2 files changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 974e85d8b6cc..19ad365dc159 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -541,12 +541,10 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
>   	if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
>   		/* GWS and OA don't need any alignment. */
>   		page_align = bp->byte_align;
> -		size <<= PAGE_SHIFT;
> -
>   	} else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
>   		/* Both size and alignment must be a multiple of 4. */
>   		page_align = ALIGN(bp->byte_align, 4);
> -		size = ALIGN(size, 4) << PAGE_SHIFT;
> +		size = ALIGN(size, 4);

The amdgpu changes should probably be a separate patch.

>   	} else {
>   		/* Memory should be aligned at least to a page size. */
>   		page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
> diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
> index 0a8bc0b7f380..6ac38092dd2a 100644
> --- a/drivers/gpu/drm/ttm/ttm_range_manager.c
> +++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
> @@ -83,9 +83,10 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
>   
>   	spin_lock(&rman->lock);
>   	ret = drm_mm_insert_node_in_range(mm, &node->mm_nodes[0],
> -					  PFN_UP(node->base.size),
> +					  node->base.size,
>   					  bo->page_alignment, 0,
> -					  place->fpfn, lpfn, mode);
> +					  place->fpfn << PAGE_SHIFT,
> +					  lpfn << PAGE_SHIFT, mode);
>   	spin_unlock(&rman->lock);
>   
>   	if (unlikely(ret)) {
> @@ -119,11 +120,10 @@ static bool ttm_range_man_intersects(struct ttm_resource_manager *man,
>   				     size_t size)
>   {
>   	struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
> -	u32 num_pages = PFN_UP(size);
>   
>   	/* Don't evict BOs outside of the requested placement range */
> -	if (place->fpfn >= (node->start + num_pages) ||
> -	    (place->lpfn && place->lpfn <= node->start))
> +	if ((place->fpfn << PAGE_SHIFT) >= (node->start + size) ||
> +	    (place->lpfn && (place->lpfn << PAGE_SHIFT) <= node->start))
>   		return false;
>   
>   	return true;
> @@ -135,10 +135,9 @@ static bool ttm_range_man_compatible(struct ttm_resource_manager *man,
>   				     size_t size)
>   {
>   	struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
> -	u32 num_pages = PFN_UP(size);
>   
>   	if (node->start < place->fpfn ||
> -	    (place->lpfn && (node->start + num_pages) > place->lpfn))
> +	    (place->lpfn && (node->start + size) > place->lpfn << PAGE_SHIFT))
>   		return false;

This looks good but can't be complete. We have a couple of place where 
node->start and node->size is used outside of TTM.

See drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h and 
drivers/gpu/drm/i915/intel_region_ttm.c for example.

Those need to be updated as well.

Regards,
Christian.


>   
>   	return true;