[Intel-gfx] [PATCH] drm/i915/dp: wait on timeout before retry include sw delay

Arun R Murthy arun.r.murthy at intel.com
Thu Nov 24 07:09:25 UTC 2022


AUX HW timeout is being set to max(4000ms), consider AUX SW timeout to
be 200ms more to avoid AUX boundary read//write.

HSDES: 1409498780

Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 664bebdecea7..6c1c9602518b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -293,14 +293,13 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 					   DP_AUX_CH_CTL_RECEIVE_ERROR);
 
 			/*
-			 * DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
-			 *   400us delay required for errors and timeouts
-			 *   Timeout errors from the HW already meet this
-			 *   requirement so skip to next iteration
+			 * Once the hw timeouts, before next try
+			 * need to add a sw timeout of 200usec(HSD: 1409498780).
 			 */
-			if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
+			if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) {
+				usleep_range(200, 300);
 				continue;
-
+			}
 			if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
 				usleep_range(400, 500);
 				continue;
-- 
2.25.1



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