[Intel-gfx] [PATCH i-g-t] tests/i915/gem_exec_balancer: exercise dmabuf import
Andrzej Hajda
andrzej.hajda at intel.com
Thu Nov 24 12:59:18 UTC 2022
On 18.11.2022 16:53, Matthew Auld wrote:
> With parallel submission it should be easy to get a fence array as the
> output fence. Try importing this into dma-buf reservation object, to see
> if anything explodes.
>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/7532
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Andrzej Hajda <andrzej.hajda at intel.com>
> Cc: Nirmoy Das <nirmoy.das at intel.com>
> ---
> tests/i915/gem_exec_balancer.c | 39 ++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
> index 4300dbd1..fdae8de5 100644
> --- a/tests/i915/gem_exec_balancer.c
> +++ b/tests/i915/gem_exec_balancer.c
> @@ -37,6 +37,7 @@
> #include "igt_sysfs.h"
> #include "igt_types.h"
> #include "sw_sync.h"
> +#include <linux/dma-buf.h>
>
> IGT_TEST_DESCRIPTION("Exercise in-kernel load-balancing");
>
> @@ -2856,6 +2857,24 @@ static void logical_sort_siblings(int i915,
> #define PARALLEL_SUBMIT_FENCE (0x1 << 3)
> #define PARALLEL_CONTEXTS (0x1 << 4)
> #define PARALLEL_VIRTUAL (0x1 << 5)
> +#define PARALLEL_OUT_FENCE_DMABUF (0x1 << 6)
> +
> +struct igt_dma_buf_sync_file {
> + __u32 flags;
> + __s32 fd;
> +};
> +
> +#define IGT_DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct igt_dma_buf_sync_file)
> +#define IGT_DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct igt_dma_buf_sync_file)
> +
> +static void dmabuf_import_sync_file(int dmabuf, uint32_t flags, int sync_fd)
> +{
> + struct igt_dma_buf_sync_file arg;
> +
> + arg.flags = flags;
> + arg.fd = sync_fd;
> + do_ioctl(dmabuf, IGT_DMA_BUF_IOCTL_IMPORT_SYNC_FILE, &arg);
> +}
Wouldn't be good to move code above to some common lib?
Anyway:
Reviewed-by: Andrzej Hajda <andrzej.hajda at intel.com>
Regards
Andrzej
>
> static void parallel_thread(int i915, unsigned int flags,
> struct i915_engine_class_instance *siblings,
> @@ -2871,6 +2890,8 @@ static void parallel_thread(int i915, unsigned int flags,
> uint32_t target_bo_idx = 0;
> uint32_t first_bb_idx = 1;
> intel_ctx_cfg_t cfg;
> + uint32_t dmabuf_handle;
> + int dmabuf;
>
> igt_assert(bb_per_execbuf < 32);
>
> @@ -2924,11 +2945,20 @@ static void parallel_thread(int i915, unsigned int flags,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.rsvd1 = ctx->id;
>
> + if (flags & PARALLEL_OUT_FENCE_DMABUF) {
> + dmabuf_handle = gem_create(i915, 4096);
> + dmabuf = prime_handle_to_fd(i915, dmabuf_handle);
> + }
> +
> for (n = 0; n < PARALLEL_BB_LOOP_COUNT; ++n) {
> execbuf.flags &= ~0x3full;
> gem_execbuf_wr(i915, &execbuf);
>
> if (flags & PARALLEL_OUT_FENCE) {
> + if (flags & PARALLEL_OUT_FENCE_DMABUF)
> + dmabuf_import_sync_file(dmabuf, DMA_BUF_SYNC_WRITE,
> + execbuf.rsvd2 >> 32);
> +
> igt_assert_eq(sync_fence_wait(execbuf.rsvd2 >> 32,
> 1000), 0);
> igt_assert_eq(sync_fence_status(execbuf.rsvd2 >> 32), 1);
> @@ -2959,6 +2989,11 @@ static void parallel_thread(int i915, unsigned int flags,
> if (fence)
> close(fence);
>
> + if (flags & PARALLEL_OUT_FENCE_DMABUF) {
> + gem_close(i915, dmabuf_handle);
> + close(dmabuf);
> + }
> +
> check_bo(i915, obj[target_bo_idx].handle,
> bb_per_execbuf * PARALLEL_BB_LOOP_COUNT, true);
>
> @@ -3420,6 +3455,10 @@ igt_main
> igt_subtest("parallel-out-fence")
> parallel(i915, PARALLEL_OUT_FENCE);
>
> + igt_subtest("parallel-out-fence-import-dmabuf")
> + parallel(i915, PARALLEL_OUT_FENCE |
> + PARALLEL_OUT_FENCE_DMABUF);
> +
> igt_subtest("parallel-keep-in-fence")
> parallel(i915, PARALLEL_OUT_FENCE | PARALLEL_IN_FENCE);
>
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