[Intel-gfx] [PATCH 1/1] drm/i915/guc: Fix GuC error capture sizing estimation and reporting

Teres Alexis, Alan Previn alan.previn.teres.alexis at intel.com
Wed Oct 5 23:31:35 UTC 2022


Hi John, tested on real PVC and the estimated min size needed was ~115K. Even without modelling, we can safely say that
an imaginary device with a tile that is 4x bigger would still be half than 1 MB. That said I shall proceed with a re-rev
that shall include dropping the size of guc-log-error-capture-region down to 1MB in addition to sticking with the
"drm_warn(...mayb too small)" and ofc rebasing to latest drm-tip. Shall rerun some tests just in case - so will get it
out later this week.

...alan

On Mon, 2022-10-03 at 18:51 -0700, Harrison, John C wrote:
> On 10/3/2022 17:46, Teres Alexis, Alan Previn wrote:
> > So as per the last response and the offline conversation we had we agreed that:
> > 
> > 1. we shall stick with drm_warn( ... maybe too small...) if the allocation didn't meet min_size.
> > 2. I'll model for PVC (since its better to look at the spec as opposed to trying to hunt for a free machine with the
> > most engines and DSS (for those steering registers that are counted multiple times).
> > 3. If #2 yields us with substantial headroom (i.e. a model's PVC would be less than 700K min_size), then lets drop to
> > 1MB allocation.
> > 
> > ...alan
> Sounds good to me.
> 
> John.
> 
> > 
> > 
> > On Mon, 2022-10-03 at 16:51 -0700, Harrison, John C wrote:
> > > On 10/3/2022 14:10, Teres Alexis, Alan Previn wrote:
> > > > On Mon, 2022-10-03 at 12:47 -0700, Harrison, John C wrote:
> > > > > On 10/3/2022 11:28, Teres Alexis, Alan Previn wrote:
> > > > > > On Fri, 2022-09-30 at 15:35 -0700, Harrison, John C wrote:
> > > > > > > On 9/30/2022 14:08, Teres Alexis, Alan Previn wrote:
> > > > > > > 
> 



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