[Intel-gfx] [PATCH v2 22/22] drm/i915/audio: Resume HSW/BDW HDA controller around ELD access

[Kai Vehmanen]

Hi,

On Wed, 12 Oct 2022, Ville Syrjala wrote:

> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> On HSW/BDW the hardware ELD buffer does not work if the controller
> is suspended. I'm not 100% which thing in there is needed to make it
> work (at least just forcing the controller into D0 with setpci is
> not enough). But a full runtime resume seems to do the trick here
> at least, and so far it looks like this doesn't even deadlock or
> anything.

excuse my lack of history information/context, but I also wonder how 
important writing this to hw AUD_EDID_DATA is anymore. All platforms since 
Sandy/Ivy Bridge have used the DRM component interface to query ELD (via 
direct kernel call i915_audio_component_get_eld()). So I don't see any 
usage of querying the ELD data via "legacy" AC_VERB_GET_HDMI_ELDD method 
(as that does require powering on the audio controller and codec). At 
least based on quick browse, I don't see this register having impact to 
other things than said HDA verb implementation in hardware. May explain 
why the issue has not been reported before.

The patches in the series look good otherwise:
Reviewed-by: Kai Vehmanen <kai.vehmanen at linux.intel.com>

> +
> +	if (hsw_hdac)
> +		pm_runtime_put(&hsw_hdac->dev);

I think this is ok.

Br, Kai