[Intel-gfx] [PATCH] i915: Extend Wa_1607297627 to Alderlake-P

[Lucas De Marchi]

On Thu, Oct 13, 2022 at 06:23:07PM +0000, Jose Souza wrote:
>missed the "drm/" in the subject 😛

with that,  Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>


Lucas De Marchi

>
>On Thu, 2022-10-13 at 11:14 -0700, José Roberto de Souza wrote:
>> BSpec: 54369
>> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
>> ---
>>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> index b8eb20a155f0d..e1d5df3a5756e 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> @@ -2300,11 +2300,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>>  	}
>>
>>  	if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) ||
>> -	    IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
>> +	    IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) {
>>  		/*
>>  		 * Wa_1607030317:tgl
>>  		 * Wa_1607186500:tgl
>> -		 * Wa_1607297627:tgl,rkl,dg1[a0]
>> +		 * Wa_1607297627:tgl,rkl,dg1[a0],adlp
>>  		 *
>>  		 * On TGL and RKL there are multiple entries for this WA in the
>>  		 * BSpec; some indicate this is an A0-only WA, others indicate
>