[Intel-gfx] [PATCH] drm/edid: Parse VRR cap fields from HFVSDB block

[Ankit Nautiyal]

This patch parses HFVSDB fields for VRR capabilities of an
HDMI2.1 sink and stores the VRR caps in a new structure in
drm_hdmi_info.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/drm_edid.c  | 26 ++++++++++++++++++++++++--
 include/drm/drm_connector.h | 27 +++++++++++++++++++++++++++
 2 files changed, 51 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 47465b9765f1..bb1f7d899580 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5823,6 +5823,21 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
 	hdmi->y420_dc_modes = dc_mask;
 }
 
+static void drm_parse_vrr_info(struct drm_hdmi_vrr_cap *hdmi_vrr,
+			       const u8 *hf_scds)
+{
+	if (hf_scds[8] & DRM_EDID_CNMVRR)
+		hdmi_vrr->cnm_vrr = true;
+	if (hf_scds[8] & DRM_EDID_CINEMA_VRR)
+		hdmi_vrr->cinema_vrr = true;
+	if (hf_scds[8] & DRM_EDID_MDELTA)
+		hdmi_vrr->m_delta = true;
+
+	hdmi_vrr->vrr_min = hf_scds[9] & DRM_EDID_VRR_MIN_MASK;
+	hdmi_vrr->vrr_max = (hf_scds[9] & DRM_EDID_VRR_MAX_UPPER_MASK) << 2;
+	hdmi_vrr->vrr_max |= hf_scds[10] & DRM_EDID_VRR_MAX_LOWER_MASK;
+}
+
 static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
 			       const u8 *hf_scds)
 {
@@ -5901,9 +5916,11 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
 	struct drm_display_info *display = &connector->display_info;
 	struct drm_hdmi_info *hdmi = &display->hdmi;
 	struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
+	struct drm_hdmi_vrr_cap *hdmi_vrr = &hdmi->vrr_cap;
 	int max_tmds_clock = 0;
 	u8 max_frl_rate = 0;
 	bool dsc_support = false;
+	bool vrr_support = false;
 
 	display->has_hdmi_infoframe = true;
 
@@ -5949,14 +5966,19 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
 
 	drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
 
+	if (cea_db_payload_len(hf_scds) >= 8 && hf_scds[8]) {
+		drm_parse_vrr_info(hdmi_vrr, hf_scds);
+		vrr_support = true;
+	}
+
 	if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) {
 		drm_parse_dsc_info(hdmi_dsc, hf_scds);
 		dsc_support = true;
 	}
 
 	drm_dbg_kms(connector->dev,
-		    "HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support: %s, DSC 1.2 support: %s\n",
-		    max_tmds_clock, str_yes_no(max_frl_rate), str_yes_no(dsc_support));
+		    "HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support: %s, VRR support: %s, DSC 1.2 support: %s\n",
+		    max_tmds_clock, str_yes_no(max_frl_rate), str_yes_no(vrr_support), str_yes_no(dsc_support));
 }
 
 static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index b1b2df48d42c..ec6ef71ab5cd 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -219,6 +219,30 @@ struct drm_hdmi_dsc_cap {
 	u8 total_chunk_kbytes;
 };
 
+
+/**
+ * struct drm_hdmi_vrr_cap - VRR capabilities of HDMI sink
+ * Describes the VRR support provided by HDMI 2.1 sink.
+ * The information is fetched fom additional HFVSDB blocks defined
+ * for HDMI 2.1.
+ */
+struct drm_hdmi_vrr_cap {
+	/** @cnm_vrr: sink supports negative Mvrr values*/
+	bool cnm_vrr;
+
+	/** @cinema_vrr: sink supports fractional and integer media rates < VRRmin*/
+	bool cinema_vrr;
+
+	/** @m_delta: sink can anticipate and compensate for frame-to-frame variation in Mvrr */
+	bool m_delta;
+
+	/** @vrr_min: VRRmin - lowest framerate in Hz that sink can support in VRR */
+	u8 vrr_min;
+
+	/** @vrr_max: VRRmax - highest framerate in Hz that sink can support in VRR */
+	u16 vrr_max;
+};
+
 /**
  * struct drm_hdmi_info - runtime information about the connected HDMI sink
  *
@@ -259,6 +283,9 @@ struct drm_hdmi_info {
 
 	/** @dsc_cap: DSC capabilities of the sink */
 	struct drm_hdmi_dsc_cap dsc_cap;
+
+	/** @vrr_cap: VRR capabilities of the sink */
+	struct drm_hdmi_vrr_cap vrr_cap;
 };
 
 /**
-- 
2.25.1