[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL
Ashutosh Dixit
ashutosh.dixit at intel.com
Mon Oct 24 20:24:17 UTC 2022
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.
v3: Included "Use GEN12 RPSTAT register" patch
v4:
- Rebased
- Dropped "Use GEN12 RPSTAT register" patch from this series
going to send separate series for it
v5:
- Included "drm/i915/gt: Change RC6 residency functions to accept register
ID's" based on code review feedback
v6:
- Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
functions to accept register ID's"
- Re-add "drm/i915: Use GEN12_RPSTAT register for GT freq" to this series
v7: Rebuild, identical to v6
v8:
- Add "drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf" to the series
(based on Rodrigo's review) to consistently use REG_FIELD_GET
- Minor changes to other patches, please see individual patches for changelogs
v9: Rebuild, identical to v8
v10: Address review comments from Rodrigo on Patch 5
v11: Change state name for MTL_CC0 to RC0 in Patch 5
Ashutosh Dixit (2):
drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf
drm/i915/gt: Use RC6 residency types as arguments to residency
functions
Badal Nilawar (2):
drm/i915/mtl: Modify CAGF functions for MTL
drm/i915/mtl: C6 residency and C state type for MTL SAMedia
Don Hiatt (1):
drm/i915: Use GEN12_RPSTAT register for GT freq
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 88 ++++++++++++++-----
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 22 +++--
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 12 +--
drivers/gpu/drm/i915/gt/intel_rc6.c | 64 +++++++++-----
drivers/gpu/drm/i915/gt/intel_rc6.h | 11 ++-
drivers/gpu/drm/i915/gt/intel_rc6_types.h | 15 +++-
drivers/gpu/drm/i915/gt/intel_rps.c | 51 ++++++++---
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/selftest_rc6.c | 6 +-
drivers/gpu/drm/i915/i915_pmu.c | 9 +-
10 files changed, 198 insertions(+), 82 deletions(-)
--
2.38.0
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